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| author | rrs <rrs@FreeBSD.org> | 2010-01-28 14:03:06 +0000 |
|---|---|---|
| committer | rrs <rrs@FreeBSD.org> | 2010-01-28 14:03:06 +0000 |
| commit | 7fa7beba1ec476b298f337d4eabcdd93f0f4757f (patch) | |
| tree | d46243b9bbca9e8a2e265d61f9d59617dc79e3aa /sys/mips | |
| parent | c764df610ef82643eaa4b8f0f8522c63ecfdf2c9 (diff) | |
| download | FreeBSD-src-7fa7beba1ec476b298f337d4eabcdd93f0f4757f.zip FreeBSD-src-7fa7beba1ec476b298f337d4eabcdd93f0f4757f.tar.gz | |
Adds additional hacks for proper bits so that
the RMI/XLR has the COP0 and COP2 bits enabled
Plus it needs SX too. Thanks again for JC in
catching this ;-)
Submitted by: JC (jayachandranc@netlogicmicro.com
Diffstat (limited to 'sys/mips')
| -rw-r--r-- | sys/mips/mips/locore.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/mips/mips/locore.S b/sys/mips/mips/locore.S index 44dda85..5cdc781 100644 --- a/sys/mips/mips/locore.S +++ b/sys/mips/mips/locore.S @@ -104,6 +104,12 @@ VECTOR(_locore, unknown) /* Reset these bits */ li t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE) +#elif defined (CPU_XLR) + /* Set these bits */ + li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX) + + /* Reset these bits */ + li t0, ~(MIPS_SR_BEV | MIPS_SR_SOFT_RESET | MIPS_SR_INT_IE) #else /* * t0: Bits to preserve if set: |
