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| author | landonf <landonf@FreeBSD.org> | 2016-06-04 19:39:05 +0000 |
|---|---|---|
| committer | landonf <landonf@FreeBSD.org> | 2016-06-04 19:39:05 +0000 |
| commit | 6ca5cb08dc00b533e51ef4dc6cd48b2c5ecab751 (patch) | |
| tree | a2d6b5fff64d680b8b8691fbec1f8c3ed1b0906a /sys/mips | |
| parent | 05a96f91516b68de58945e078d1b08834517db86 (diff) | |
| download | FreeBSD-src-6ca5cb08dc00b533e51ef4dc6cd48b2c5ecab751.zip FreeBSD-src-6ca5cb08dc00b533e51ef4dc6cd48b2c5ecab751.tar.gz | |
bhnd(4): Add support for chipc-attached flash
This adds support for serial (via SPI) and parallel (via CFI) flash
as found on BCM47xx/BCM53xx SoCs.
Submitted by: Michael Zhilin <mizhka@gmail.com>
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D6250
Diffstat (limited to 'sys/mips')
| -rw-r--r-- | sys/mips/broadcom/uart_bus_chipc.c | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/sys/mips/broadcom/uart_bus_chipc.c b/sys/mips/broadcom/uart_bus_chipc.c index fa2fa2d..29b84ec 100644 --- a/sys/mips/broadcom/uart_bus_chipc.c +++ b/sys/mips/broadcom/uart_bus_chipc.c @@ -45,9 +45,12 @@ __FBSDID("$FreeBSD$"); #include <dev/uart/uart_bus.h> #include <dev/uart/uart_cpu.h> +#include <dev/bhnd/cores/chipc/chipcvar.h> + #include "uart_if.h" #include "bhnd_chipc_if.h" + static int uart_chipc_probe(device_t dev); extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; @@ -55,9 +58,18 @@ extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; static void uart_chipc_identify(driver_t *driver, device_t parent) { - struct chipc_capabilities *caps; + struct chipc_caps *caps; - caps = BHND_CHIPC_GET_CAPABILITIES(parent); + if (device_find_child(parent, "uart", -1) != NULL) + return; + + caps = BHND_CHIPC_GET_CAPS(parent); + + if (caps == NULL) { + device_printf(parent, "error: can't retrieve ChipCommon " + "capabilities\n"); + return; + } if (caps->num_uarts == 0) return; @@ -74,6 +86,7 @@ uart_chipc_probe(device_t dev) struct uart_softc *sc; struct resource *res; int rid; + int err; rid = 0; res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); @@ -97,7 +110,11 @@ uart_chipc_probe(device_t dev) sc->sc_bas.bst = sc->sc_sysdev->bas.bst; sc->sc_bas.bsh = sc->sc_sysdev->bas.bsh; - bus_release_resource(dev, SYS_RES_MEMORY, rid, res); + err = bus_release_resource(dev, SYS_RES_MEMORY, rid, res); + if (err) { + device_printf(dev, "can't release resource [%d]\n", rid); + return (ENXIO); + } /* We use internal SoC clock generator with non-standart freq MHz */ return (uart_bus_probe(dev, 0, sc->sc_sysdev->bas.rclk, 0, 0)); |
