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authorrwatson <rwatson@FreeBSD.org>2009-04-19 20:19:13 +0000
committerrwatson <rwatson@FreeBSD.org>2009-04-19 20:19:13 +0000
commit8df790f38fc6501dadb8302ef4a236525bb7d2c4 (patch)
tree30f708f0df558e2567b5c3f03e96c6e13b769058 /sys/mips
parent293f0e00a8f2ff1afb964eb68e56e4ec5a140506 (diff)
downloadFreeBSD-src-8df790f38fc6501dadb8302ef4a236525bb7d2c4.zip
FreeBSD-src-8df790f38fc6501dadb8302ef4a236525bb7d2c4.tar.gz
For each architecture, define CACHE_LINE_SHIFT and a derived
CACHE_LINE_SIZE constant. These constants are intended to over-estimate the cache line size, and be used at compile-time when a run-time tuning alternative isn't appropriate or available. Defaults for all architectures are 64 bytes, except powerpc where it is 128 bytes (used on G5 systems). MFC after: 2 weeks Discussed on: arch@
Diffstat (limited to 'sys/mips')
-rw-r--r--sys/mips/include/param.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/mips/include/param.h b/sys/mips/include/param.h
index 5acdfdf..55f877f 100644
--- a/sys/mips/include/param.h
+++ b/sys/mips/include/param.h
@@ -89,6 +89,11 @@
#define ALIGNBYTES _ALIGNBYTES
#define ALIGN(p) _ALIGN(p)
+#ifndef CACHE_LINE_SHIFT
+#define CACHE_LINE_SHIFT 6
+#endif
+#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
+
#define NBPG 4096 /* bytes/page */
#define PGOFSET (NBPG-1) /* byte offset into page */
#define PGSHIFT 12 /* LOG2(NBPG) */
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