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| author | ian <ian@FreeBSD.org> | 2014-05-15 16:59:47 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2014-05-15 16:59:47 +0000 |
| commit | fa992863d2953ae935e914366aeafac44ad9d005 (patch) | |
| tree | 5706b407ffe7e0825c55edcf803c8fc2895b8ce6 /sys/mips | |
| parent | 36cb581eaebdc860bcc7c968ed136cfe82679379 (diff) | |
| download | FreeBSD-src-fa992863d2953ae935e914366aeafac44ad9d005.zip FreeBSD-src-fa992863d2953ae935e914366aeafac44ad9d005.tar.gz | |
MFC r261414, r261415, r261417, r261418, r261419
Don't call device_set_ivars() for the mmchs
Change the way pcpu and curthread are stored per-core
Invalidate cachelines for bounce pages on PREREAD too, there may still be
stale entries from a previous transfer.
Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu,
such as the one found in the RPi, don't have it, and just hang when we try
to access it.
Diffstat (limited to 'sys/mips')
0 files changed, 0 insertions, 0 deletions
