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authorbz <bz@FreeBSD.org>2014-08-16 14:21:03 +0000
committerbz <bz@FreeBSD.org>2014-08-16 14:21:03 +0000
commit919a83705802c08fe80c350615ad98cee21c3fc6 (patch)
treef67b8f5eacff4a7d692a192ae23790b110f78e18 /sys/mips
parent62c1685fc5464a8a2f1ddb5eefdf3d7fcf7e4e40 (diff)
downloadFreeBSD-src-919a83705802c08fe80c350615ad98cee21c3fc6.zip
FreeBSD-src-919a83705802c08fe80c350615ad98cee21c3fc6.tar.gz
MFC r263632:
For BERI on NetFPGA assume HZ=100 by default. Remove the uart support in favour of a "jtag-uart" interface imitation providing a much simpler interface, directly exported to the host, allowing the toolchain to be shared with BERI on Altera. [1] Submitted by: Jong Hun HAN (jong.han cl.cam.ac.uk) [1] Sponsored by: DARPA/AFRL
Diffstat (limited to 'sys/mips')
-rw-r--r--sys/mips/conf/BERI_NETFPGA_MDROOT5
1 files changed, 4 insertions, 1 deletions
diff --git a/sys/mips/conf/BERI_NETFPGA_MDROOT b/sys/mips/conf/BERI_NETFPGA_MDROOT
index f98389a..bd7b3a4 100644
--- a/sys/mips/conf/BERI_NETFPGA_MDROOT
+++ b/sys/mips/conf/BERI_NETFPGA_MDROOT
@@ -10,11 +10,14 @@ include "BERI_TEMPLATE"
ident BERI_NETFPGA_MDROOT
+options HZ=100
+
options FDT
options FDT_DTB_STATIC
makeoptions FDT_DTS_FILE=beri-netfpga.dts
-device uart
+#device uart
+device altera_jtag_uart
#
# This kernel configuration uses an embedded memory root file system.
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