Add support to the virtual memory system for configuring machine-

dependent memory attributes:

Rename vm_cache_mode_t to vm_memattr_t.  The new name reflects the
fact that there are machine-dependent memory attributes that have
nothing to do with controlling the cache's behavior.

Introduce vm_object_set_memattr() for setting the default memory
attributes that will be given to an object's pages.

Introduce and use pmap_page_{get,set}_memattr() for getting and
setting a page's machine-dependent memory attributes.  Add full
support for these functions on amd64 and i386 and stubs for them on
the other architectures.  The function pmap_page_set_memattr() is also
responsible for any other machine-dependent aspects of changing a
page's memory attributes, such as flushing the cache or updating the
direct map.  The uses include kmem_alloc_contig(), vm_page_alloc(),
and the device pager:

  kmem_alloc_contig() can now be used to allocate kernel memory with
  non-default memory attributes on amd64 and i386.

  vm_page_alloc() and the device pager will set the memory attributes
  for the real or fictitious page according to the object's default
  memory attributes.

Update the various pmap functions on amd64 and i386 that map pages to
incorporate each page's memory attributes in the mapping.

Notes: (1) Inherent to this design are safety features that prevent
the specification of inconsistent memory attributes by different
mappings on amd64 and i386.  In addition, the device pager provides a
warning when a device driver creates a fictitious page with memory
attributes that are inconsistent with the real page that the
fictitious page is an alias for. (2) Storing the machine-dependent
memory attributes for amd64 and i386 as a dedicated "int" in "struct
md_page" represents a compromise between space efficiency and the ease
of MFCing these changes to RELENG_7.

In collaboration with: jhb

Approved by:	re (kib)

2 files changed, 6 insertions, 4 deletions

diff --git a/sys/mips/include/pmap.h b/sys/mips/include/pmap.h
index 2979f3b..4546cff 100644
--- a/sys/mips/include/pmap.h
+++ b/sys/mips/include/pmap.h
@@ -155,7 +155,9 @@ extern vm_paddr_t mips_wired_tlb_physmem_start;
 extern vm_paddr_t mips_wired_tlb_physmem_end;
 extern u_int need_wired_tlb_page_pool;
 
+#define	pmap_page_get_memattr(m)	VM_MEMATTR_DEFAULT
 #define	pmap_page_is_mapped(m)	(!TAILQ_EMPTY(&(m)->md.pv_list))
+#define	pmap_page_set_memattr(m, ma)	(void)0
 
 void pmap_bootstrap(void);
 void *pmap_mapdev(vm_offset_t, vm_size_t);
diff --git a/sys/mips/include/vm.h b/sys/mips/include/vm.h
index 9270d50..c0aa55c 100644
--- a/sys/mips/include/vm.h
+++ b/sys/mips/include/vm.h
@@ -31,10 +31,10 @@
 
 #include <machine/pte.h>
 
-/* Cache control options. */
-#define	VM_CACHE_UNCACHED		((vm_cache_mode_t)PTE_UNCACHED)
-#define	VM_CACHE_CACHEABLE_NONCOHERENT	((vm_cache_mode_t)PTE_CACHE)
+/* Memory attributes. */
+#define	VM_MEMATTR_UNCACHED			((vm_memattr_t)PTE_UNCACHED)
+#define	VM_MEMATTR_CACHEABLE_NONCOHERENT	((vm_memattr_t)PTE_CACHE)
 
-#define	VM_CACHE_DEFAULT		VM_CACHE_CACHEABLE_NONCOHERENT
+#define	VM_MEMATTR_DEFAULT		VM_MEMATTR_CACHEABLE_NONCOHERENT
 
 #endif /* !_MACHINE_VM_H_ */