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authoradrian <adrian@FreeBSD.org>2011-12-20 00:33:56 +0000
committeradrian <adrian@FreeBSD.org>2011-12-20 00:33:56 +0000
commitd143e961c0ca46c1ddaf2b9a0d97f981ec11614b (patch)
treeb670dbdddfa91d87bd8b820faf838930a4622160 /sys/mips
parent72855612c5ba2b28cea756e98b98f146bbfaa97d (diff)
downloadFreeBSD-src-d143e961c0ca46c1ddaf2b9a0d97f981ec11614b.zip
FreeBSD-src-d143e961c0ca46c1ddaf2b9a0d97f981ec11614b.tar.gz
Remove these locks - they aren't strictly needed and cause measurable
performance issues. * Access to the GPIO bus is already locked by requesting and releasing the bus - thus the lock isn't really needed for each GPIO pin change. * Don't lock and unlock the GPIO bus for -each- i2c access - the i2c bus code is already doing this by calling the upper layer callback to request/release the bus. This thus locks the bus for the entirety of the transaction. TODO: * Further verify that everything is correctly requesting/ releasing the GPIO bus. * Look at how to lock the GPIO pin configuration stuff, potentially by locking/unlocking the bus at the gpiobus layer.
Diffstat (limited to 'sys/mips')
-rw-r--r--sys/mips/atheros/ar71xx_gpio.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/sys/mips/atheros/ar71xx_gpio.c b/sys/mips/atheros/ar71xx_gpio.c
index 11906ff..592cd2b 100644
--- a/sys/mips/atheros/ar71xx_gpio.c
+++ b/sys/mips/atheros/ar71xx_gpio.c
@@ -89,17 +89,13 @@ static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
static void
ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
{
- GPIO_LOCK(sc);
GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
- GPIO_UNLOCK(sc);
}
static void
ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
{
- GPIO_LOCK(sc);
GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
- GPIO_UNLOCK(sc);
}
static void
@@ -109,7 +105,6 @@ ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
uint32_t mask;
mask = 1 << pin->gp_pin;
- GPIO_LOCK(sc);
/*
* Manage input/output
@@ -125,8 +120,6 @@ ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
}
}
-
- GPIO_UNLOCK(sc);
}
static int
@@ -253,12 +246,10 @@ ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
if (i >= sc->gpio_npins)
return (EINVAL);
- GPIO_LOCK(sc);
if (value)
GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
else
GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
- GPIO_UNLOCK(sc);
return (0);
}
@@ -277,9 +268,7 @@ ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
if (i >= sc->gpio_npins)
return (EINVAL);
- GPIO_LOCK(sc);
*val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
- GPIO_UNLOCK(sc);
return (0);
}
@@ -298,13 +287,11 @@ ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
if (i >= sc->gpio_npins)
return (EINVAL);
- GPIO_LOCK(sc);
res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
if (res)
GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
else
GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
- GPIO_UNLOCK(sc);
return (0);
}
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