Add a configuration file for the Atheros PB47 reference board.

This is an AR71xx based board with 8MB flash, 64MB RAM, a
Mini-PCI+ slot (see below) and a single 10/100/1000baseT
ethernet port.  It also has two USB ports.

This is an easier board than most to add as it doesn't have a
switch PHY on-board.  This made it (mostly) trivial to craft a
working configuration.

Things to note:

* This, like most other reference boards, use uboot rather then
  redboot.  It means that you typically have to manually flash
  both the kernel and rootfs partitions.

* Since there's currently no (nice) way to extract out the
  ethernet MAC and RAM from the uboot environment, the RAM
  will default to 32mb and the MAC will be something very
  incorrect.   I'll try to fix this up in a subsequent commit
  or two, even if it's just some hard-coded nonsense in
  ar71xx_machdep.c for now.

* The board is designed for a specific model of mini-PCI+
  NIC which never made it into production.  Normal mini-PCI
  NICs will work fine; if you happen to have the NIC in question
  then it will work fine with this board.

2 files changed, 130 insertions, 0 deletions

diff --git a/sys/mips/conf/PB47 b/sys/mips/conf/PB47
new file mode 100644
index 0000000..c5069c0
--- /dev/null
+++ b/sys/mips/conf/PB47
@@ -0,0 +1,51 @@
+#
+# Atheros PB47 reference board.
+#
+# * one MiniPCI+ slot (modified to allow two idsel lines
+#   on the one slot, for a specific kind of internal-only
+#   NIC;
+# * one XMII slot
+# * One ethernet PHY
+# * Akros Silicon AS1834
+# * 8MB NOR SPI flash
+# * 64MB RAM
+#
+# $FreeBSD$
+#
+
+include		"AR71XX_BASE"
+ident		"PB47"
+hints		"PB47.hints"
+
+# Enable the uboot environment stuff rather then the
+# redboot stuff.
+options		AR71XX_ENV_UBOOT
+
+# XXX TODO: add uboot boot parameter parsing to extract MAC, RAM.
+# Right now it will just detect 32mb out of 64mb, as well as
+# return a garbage MAC address.
+
+# don't compile these in - the default flash area for kernel space
+# is only 1.2 megabytes.  To keep the flash allocation in line with
+# what the documentation says for this board, we'll just have to keep
+# the kernel smaller than that.
+nodevice wlan, wlan_wep, wlan_ccmp, wlan_tkip, wlan_xauth
+nodevice ath, ath_pci, ath_hal, ath_rate_sample
+
+# Since the module build doesn't like TDMA..
+nooptions	IEEE80211_SUPPORT_TDMA
+
+# For DOS - enable if required
+#options		GEOM_PART_BSD
+#options		GEOM_PART_MBR
+#options		MSDOSFS
+
+# uzip - to boot natively from flash
+device		geom_uzip
+options		GEOM_UZIP
+
+# Used for the static uboot partition map
+device		geom_map
+
+# Boot off of the rootfs, as defined in the geom_map setup.
+options		ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/PB47.hints b/sys/mips/conf/PB47.hints
new file mode 100644
index 0000000..2bcdc77
--- /dev/null
+++ b/sys/mips/conf/PB47.hints
@@ -0,0 +1,79 @@
+
+# $FreeBSD$
+
+# There's two interfaces, but only one socket is populated.
+#
+# There's an AR8021 PHY attached to arge1.
+#
+# XXX TODO: figure out where to extract the MAC from.
+hint.arge.1.phymask=0x01
+
+# XXX TODO: pass in hints for the GPIO -> LED mapping for the
+# minipci slot.  The specific customer reference design NIC
+# wires GPIO5 from each AR9220 to one of two GPIO pins on the
+# MiniPCI bus.  However, this may be very specific to the NIC
+# being used.
+
+# The default flash layout:
+# uboot: 192k
+# env: 64k
+# rootfs: 6144k
+# uimage (kernel): 1728k
+# caldata: 64k
+#
+# We steal 64k from the end of rootfs to store the local config.
+
+hint.map.0.at="flash/spi0"
+hint.map.0.start=0x00000000
+hint.map.0.end=0x000030000
+hint.map.0.name="uboot"
+hint.map.0.readonly=1
+
+hint.map.1.at="flash/spi0"
+hint.map.1.start=0x00030000
+hint.map.1.end=0x00040000
+hint.map.1.name="uboot-env"
+hint.map.1.readonly=1
+
+hint.map.2.at="flash/spi0"
+hint.map.2.start=0x00040000
+hint.map.2.end=0x00630000
+hint.map.2.name="rootfs"
+hint.map.2.readonly=1
+
+hint.map.3.at="flash/spi0"
+hint.map.3.start=0x00630000
+hint.map.3.end=0x00640000
+hint.map.3.name="cfg"
+hint.map.3.readonly=0
+
+hint.map.4.at="flash/spi0"
+hint.map.4.start=0x00640000
+hint.map.4.end=0x007f0000
+hint.map.4.name="kernel"
+hint.map.4.readonly=1
+
+hint.map.5.at="flash/spi0"
+hint.map.5.start=0x007f0000
+hint.map.5.end=0x00800000
+hint.map.5.name="art"
+hint.map.5.readonly=1
+
+# Don't flip on anything that isn't already enabled by the
+# bootloader.
+hint.gpio.0.function_set=0x00000000
+hint.gpio.0.function_clear=0x00000000
+
+# Which GPIO lines to enable - just GPIO2/3 for the LEDs.
+hint.gpio.0.pinmask=0x0000000c
+
+# GPIO2 and GPIO3 are LEDs, where 0=on and 1=off.
+# XXX TODO: teach gpioled about polarity?
+hint.gpioled.0.at="gpiobus0"
+hint.gpioled.0.pins="0x0004"
+hint.gpioled.0.name="led1"
+
+hint.gpioled.1.at="gpiobus0"
+hint.gpioled.1.pins="0x0008"
+hint.gpioled.1.name="led2"
+