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author | marcel <marcel@FreeBSD.org> | 2010-03-26 02:29:15 +0000 |
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committer | marcel <marcel@FreeBSD.org> | 2010-03-26 02:29:15 +0000 |
commit | a8e65314630b2f05c14dd732578c1c381ff74567 (patch) | |
tree | 91bb2c98825e43f9e785e874b29c20a06285796d /sys/mips/sibyte/sb_scd.c | |
parent | d67e4cffdd6e55f3bc9f77eea58fc0cea6e8fc08 (diff) | |
download | FreeBSD-src-a8e65314630b2f05c14dd732578c1c381ff74567.zip FreeBSD-src-a8e65314630b2f05c14dd732578c1c381ff74567.tar.gz |
Only use the interval timer for clock interrupts on the BSP and
have the BSP use IPIs to trigger clock interrupts on the APs.
This allows us to run on hardware configurations for which the
ITC has non-uniform frequencies across CPUs.
While here, change the clock XIV to type IPI so as to protect
the interrupt delivery against CPU re-balancing once that's
implemented.
Diffstat (limited to 'sys/mips/sibyte/sb_scd.c')
0 files changed, 0 insertions, 0 deletions