summaryrefslogtreecommitdiffstats
path: root/sys/mips/rmi/iodi.c
diff options
context:
space:
mode:
authorjchandra <jchandra@FreeBSD.org>2010-09-06 06:18:49 +0000
committerjchandra <jchandra@FreeBSD.org>2010-09-06 06:18:49 +0000
commit9b66f5dc60bfc4c382243087fbfa56dacaf0fbc9 (patch)
tree8deb1ca8cc8a31572abc01dd4085bdc782d0fa74 /sys/mips/rmi/iodi.c
parent2e7fd38ddc587c0ca625685c9029dfd15cc11f0d (diff)
downloadFreeBSD-src-9b66f5dc60bfc4c382243087fbfa56dacaf0fbc9.zip
FreeBSD-src-9b66f5dc60bfc4c382243087fbfa56dacaf0fbc9.tar.gz
XLR/XLS hardware interrupts should be programmed level triggered at the
PIC. This should fix the interrupt releated issues seen after the interrupt handling re-write for SMP.
Diffstat (limited to 'sys/mips/rmi/iodi.c')
-rw-r--r--sys/mips/rmi/iodi.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/mips/rmi/iodi.c b/sys/mips/rmi/iodi.c
index 4796567..c9913f2 100644
--- a/sys/mips/rmi/iodi.c
+++ b/sys/mips/rmi/iodi.c
@@ -104,7 +104,7 @@ iodi_setup_intr(device_t dev, device_t child,
/* FIXME uart 1? */
cpu_establish_hardintr("uart", filt, intr, arg,
PIC_UART_0_IRQ, flags, cookiep);
- pic_setup_intr(PIC_IRT_UART_0_INDEX, PIC_UART_0_IRQ, 0x1, 0);
+ pic_setup_intr(PIC_IRT_UART_0_INDEX, PIC_UART_0_IRQ, 0x1, 1);
} else if (strcmp(name, "rge") == 0 || strcmp(name, "nlge") == 0) {
int irq;
@@ -112,15 +112,15 @@ iodi_setup_intr(device_t dev, device_t child,
irq = (intptr_t)ires->__r_i;
cpu_establish_hardintr("rge", filt, intr, arg, irq, flags,
cookiep);
- pic_setup_intr(irq - PIC_IRQ_BASE, irq, 0x1, 0);
+ pic_setup_intr(irq - PIC_IRQ_BASE, irq, 0x1, 1);
} else if (strcmp(name, "ehci") == 0) {
cpu_establish_hardintr("ehci", filt, intr, arg, PIC_USB_IRQ, flags,
cookiep);
- pic_setup_intr(PIC_USB_IRQ - PIC_IRQ_BASE, PIC_USB_IRQ, 0x1, 0);
+ pic_setup_intr(PIC_USB_IRQ - PIC_IRQ_BASE, PIC_USB_IRQ, 0x1, 1);
} else if (strcmp(name, "ata") == 0) {
xlr_establish_intr("ata", filt, intr, arg, PIC_PCMCIA_IRQ, flags,
cookiep, bridge_pcmcia_ack);
- pic_setup_intr(PIC_PCMCIA_IRQ - PIC_IRQ_BASE, PIC_PCMCIA_IRQ, 0x1, 0);
+ pic_setup_intr(PIC_PCMCIA_IRQ - PIC_IRQ_BASE, PIC_PCMCIA_IRQ, 0x1, 1);
}
return (0);
}
OpenPOWER on IntegriCloud