Revamp XLR interrupt handling, the previous scheme does not work well on

SMP.

We used to route all PIC based interrupts to cpu 0, and used the per-CPU
interrupt mask to enable/disable interrupts. But the interrupt threads can
run on any cpu on SMP, and the interrupt thread will re-enable the interrupts
on the CPU it runs on when it is done, and not on cpu0 where the PIC will
still send interrupts to.

The fix is move the disable/enable for PIC based interrupts to PIC, we will
ack on PIC only when the interrupt thread is done, and we do not use the
per-CPU interrupt mask.

The changes also introduce a way for subsystems to add a function that
will be called to clear the interrupt on the subsystem. Currently This is
used by the PCI/PCIe for doing additional work during the interrupt
handling.

1 files changed, 4 insertions, 5 deletions

diff --git a/sys/mips/rmi/interrupt.h b/sys/mips/rmi/interrupt.h
index edb475a..8573338 100644
--- a/sys/mips/rmi/interrupt.h
+++ b/sys/mips/rmi/interrupt.h
@@ -40,10 +40,9 @@
  * XLR needs custom pre and post handlers for PCI/PCI-e interrupts
  * XXX: maybe follow i386 intsrc model
  */
-void xlr_cpu_establish_hardintr(const char *, driver_filter_t *,
-    driver_intr_t *, void *, int, int, void **, void (*)(void *),
-    void (*)(void *), void (*)(void *), int (*)(void *, u_char));
-void xlr_mask_hard_irq(void *);
-void xlr_unmask_hard_irq(void *);
+void xlr_establish_intr(const char *name, driver_filter_t filt,
+    driver_intr_t handler, void *arg, int irq, int flags,
+    void **cookiep, void (*busack)(int));
+void xlr_enable_irq(int irq);
 
 #endif				/* _RMI_INTERRUPT_H_ */