Support for EEPROM and CPLD on XLP EVP boards.

On XLP evaluation platform, the board information is stored
in an I2C eeprom and the network block configuration is available
from a CPLD connected to the GBU (NOR flash bus). Add support
for both of these.

7 files changed, 487 insertions, 24 deletions

diff --git a/sys/mips/nlm/board.c b/sys/mips/nlm/board.c
index 5fd771d..c84ea33 100644
--- a/sys/mips/nlm/board.c
+++ b/sys/mips/nlm/board.c
@@ -36,44 +36,104 @@ __FBSDID("$FreeBSD$");
 #include <sys/lock.h>
 #include <sys/mutex.h>
 
+#include <net/ethernet.h>
+
 #include <mips/nlm/hal/mips-extns.h>
 #include <mips/nlm/hal/haldefs.h>
 #include <mips/nlm/hal/iomap.h>
 #include <mips/nlm/hal/fmn.h>
 #include <mips/nlm/hal/pic.h>
+#include <mips/nlm/hal/sys.h>
 #include <mips/nlm/hal/uart.h>
 
+#include <mips/nlm/xlp.h>
 #include <mips/nlm/board.h>
 
+static uint8_t board_eeprom_buf[EEPROM_SIZE];
+static int board_eeprom_set;
+
 struct xlp_board_info xlp_board_info;
 
-int nlm_setup_xlp_board(void);
+static void
+nlm_print_processor_info(void)
+{
+	uint32_t procid;
+	int prid, rev;
+	char *chip, *revstr;
+
+	procid = mips_rd_prid();
+	prid = (procid >> 8) & 0xff;
+	rev = procid & 0xff;
+
+	switch (prid) {
+	case CHIP_PROCESSOR_ID_XLP_8XX:
+		chip = "XLP 832";
+		break;
+	case CHIP_PROCESSOR_ID_XLP_3XX:
+		chip = "XLP 3xx";
+		break;
+	case CHIP_PROCESSOR_ID_XLP_432:
+	case CHIP_PROCESSOR_ID_XLP_416:
+		chip = "XLP 4xx";
+		break;
+	default:
+		chip = "XLP ?xx";
+		break;
+	}
+	switch (rev) {
+	case 0:
+		revstr = "A0"; break;
+	case 1:
+		revstr = "A1"; break;
+	case 2:
+		revstr = "A2"; break;
+	case 3:
+		revstr = "B0"; break;
+	default:
+		revstr = "??"; break;
+	}
+
+	printf("Processor info:\n");
+	printf("  Netlogic %s %s [%x]\n", chip, revstr, procid);
+}
 
 /*
- * All our knowledge of chip and board that cannot be detected by probing
+ * All our knowledge of chip and board that cannot be detected by probing 
  * at run-time goes here
  */
-
-int
+static int
 nlm_setup_xlp_board(void)
 {
 	struct xlp_board_info	*boardp;
-	int	node;
+	int rv;
+	uint8_t *b;
 
 	/* start with a clean slate */
 	boardp = &xlp_board_info;
-	memset(boardp, 0, sizeof(xlp_board_info));
+	memset(boardp, 0, sizeof(*boardp));
 	boardp->nodemask = 0x1;	/* only node 0 */
+	nlm_print_processor_info();
 
-	for (node = 0; node < XLP_MAX_NODES; node++) {
-		if ((boardp->nodemask & (1 << node)) == 0)
-			continue;
-	}
-	return 0;
+	b =  board_eeprom_buf;
+	rv = nlm_board_eeprom_read(0, EEPROM_I2CBUS, EEPROM_I2CADDR, 0, b,
+	    EEPROM_SIZE);
+	if (rv == 0) {
+		board_eeprom_set = 1;
+		printf("Board info (EEPROM on i2c@%d at %#X):\n",
+		    EEPROM_I2CBUS, EEPROM_I2CADDR);
+		printf("  Model:      %7.7s %2.2s\n", &b[16], &b[24]);
+		printf("  Serial #:   %3.3s-%2.2s\n", &b[27], &b[31]);
+		printf("  MAC addr:   %02x:%02x:%02x:%02x:%02x:%02x\n",
+		    b[2], b[3], b[4], b[5], b[6], b[7]);
+	} else
+		printf("Board Info: Error on EEPROM read (i2c@%d %#X).\n",
+		    EEPROM_I2CBUS, EEPROM_I2CADDR);
+
+	return (0);
 }
 
-int nlm_board_info_setup()
+int nlm_board_info_setup(void)
 {
 	nlm_setup_xlp_board();
-	return 0;
+	return (0);
 }
diff --git a/sys/mips/nlm/board.h b/sys/mips/nlm/board.h
index 5a0c868..3a2ae24 100644
--- a/sys/mips/nlm/board.h
+++ b/sys/mips/nlm/board.h
@@ -5,7 +5,7 @@
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
  * met:
- *
+ * 
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
@@ -32,15 +32,19 @@
 #ifndef __NLM_BOARD_H__
 #define __NLM_BOARD_H__
 
-#define XLP_NAE_NBLOCKS		5
-#define XLP_NAE_NPORTS		4
+#define	XLP_NAE_NBLOCKS		5
+#define	XLP_NAE_NPORTS		4
 #define	XLP_I2C_MAXDEVICES	8
 
-struct xlp_i2c_devinfo {
-	u_int	addr;		/* keep first, for i2c ivars to work */
-	int	bus;
-	char	*device;
-};
+/*
+ * EVP board EEPROM info
+ */
+#define	EEPROM_I2CBUS		1
+#define	EEPROM_I2CADDR		0xAE
+#define	EEPROM_SIZE	 	48
+#define	EEPROM_MACADDR_OFFSET	2
+
+#if !defined(LOCORE) && !defined(__ASSEMBLY__)
 
 struct xlp_port_ivars {
 	int	port;
@@ -65,12 +69,19 @@ struct xlp_nae_ivars {
 struct xlp_board_info {
 	u_int	nodemask;
 	struct xlp_node_info {
-		struct xlp_i2c_devinfo	i2c_devs[XLP_I2C_MAXDEVICES];
 		struct xlp_nae_ivars	nae_ivars;
 	} nodes[XLP_MAX_NODES];
 };
 
-extern struct xlp_board_info xlp_board_info;
 int nlm_board_info_setup(void);
 
+int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs,
+    uint8_t *buf,int sz);
+uint64_t nlm_board_cpld_base(int node, int chipselect);
+int nlm_board_cpld_majorversion(uint64_t cpldbase);
+int nlm_board_cpld_minorversion(uint64_t cpldbase);
+void nlm_board_cpld_reset(uint64_t cpldbase);
+int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot);
+#endif
+
 #endif
diff --git a/sys/mips/nlm/board_cpld.c b/sys/mips/nlm/board_cpld.c
new file mode 100644
index 0000000..883a321
--- /dev/null
+++ b/sys/mips/nlm/board_cpld.c
@@ -0,0 +1,113 @@
+/*-
+ * Copyright (c) 2003-2012 Broadcom Corporation
+ * All Rights Reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/endian.h>
+
+#include <mips/nlm/hal/mips-extns.h>
+#include <mips/nlm/hal/haldefs.h>
+#include <mips/nlm/hal/iomap.h>
+#include <mips/nlm/hal/gbu.h>
+
+#include <mips/nlm/board.h>
+
+#define CPLD_REVISION		0x0
+#define CPLD_RESET		0x1
+#define CPLD_CTRL		0x2
+#define CPLD_RSVD		0x3
+#define CPLD_PWR_CTRL		0x4
+#define CPLD_MISC		0x5
+#define CPLD_CTRL_STATUS	0x6
+#define CPLD_PWR_INTR_STATUS	0x7
+#define CPLD_DATA		0x8
+
+static __inline
+int nlm_cpld_read(uint64_t base, int reg)
+{
+	uint16_t val;
+
+	val = *(volatile uint16_t *)(long)(base + reg * 2);
+	return bswap16(val);
+}
+
+static __inline void
+nlm_cpld_write(uint64_t base, int reg, uint16_t data)
+{
+	bswap16(data);
+	*(volatile uint16_t *)(long)(base + reg * 2) = data;
+}
+
+int
+nlm_board_cpld_majorversion(uint64_t base)
+{
+	return (nlm_cpld_read(base, CPLD_REVISION) >> 8);
+}
+
+int
+nlm_board_cpld_minorversion(uint64_t base)
+{
+	return (nlm_cpld_read(base, CPLD_REVISION) & 0xff);
+}
+
+uint64_t nlm_board_cpld_base(int node, int chipselect)
+{
+	uint64_t gbubase, cpld_phys;
+
+	gbubase = nlm_get_gbu_regbase(node);
+	cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect));
+	return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8));
+}
+
+void
+nlm_board_cpld_reset(uint64_t base)
+{
+
+	nlm_cpld_write(base, CPLD_RESET, 1 << 15);
+	for(;;)
+		__asm __volatile("wait");
+}
+
+/* get daughter board type */
+int
+nlm_board_cpld_dboard_type(uint64_t base, int slot)
+{
+	uint16_t val;
+	int shift = 0;
+
+	switch (slot) {
+	case 0: shift = 0; break;
+	case 1: shift = 4; break;
+	case 2: shift = 2; break;
+	case 3: shift = 6; break;
+	}
+	val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift;
+	return (val & 0x3);
+}
diff --git a/sys/mips/nlm/board_eeprom.c b/sys/mips/nlm/board_eeprom.c
new file mode 100644
index 0000000..112f994
--- /dev/null
+++ b/sys/mips/nlm/board_eeprom.c
@@ -0,0 +1,172 @@
+/*-
+ * Copyright (c) 2003-2012 Broadcom Corporation
+ * All Rights Reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+#include <sys/param.h>
+#include <sys/endian.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/limits.h>
+#include <sys/bus.h>
+
+#include <dev/iicbus/iicoc.h>
+
+#include <mips/nlm/hal/haldefs.h>
+#include <mips/nlm/hal/iomap.h>
+#include <mips/nlm/hal/mips-extns.h> /* needed by board.h */
+
+#include <mips/nlm/board.h>
+
+/*
+ * We have to read the EEPROM in early boot (now only for MAC addr)
+ * but later for board information.  Use simple polled mode driver
+ * for I2C
+ */
+#define	oc_read_reg(reg)	nlm_read_reg(eeprom_i2c_base, reg)
+#define	oc_write_reg(reg, val)	nlm_write_reg(eeprom_i2c_base, reg, val)
+
+static uint64_t eeprom_i2c_base;
+
+static int
+oc_wait_on_status(uint8_t bit)
+{
+	int tries = I2C_TIMEOUT;
+	uint8_t status;
+
+	do {
+		status = oc_read_reg(OC_I2C_STATUS_REG);
+	} while ((status & bit) != 0 && --tries > 0);
+
+	return (tries == 0 ? -1: 0);
+}
+
+static int
+oc_rd_cmd(uint8_t cmd)
+{
+	uint8_t data;
+
+		oc_write_reg(OC_I2C_CMD_REG, cmd);
+		if (oc_wait_on_status(OC_STATUS_TIP) < 0)
+			return (-1);
+
+	data = oc_read_reg(OC_I2C_DATA_REG);
+	return (data);
+}
+ 
+static int
+oc_wr_cmd(uint8_t data, uint8_t cmd)
+{
+	oc_write_reg(OC_I2C_DATA_REG, data);
+	oc_write_reg(OC_I2C_CMD_REG, cmd);
+
+	if (oc_wait_on_status(OC_STATUS_TIP) < 0)
+		return (-1);
+	return (0);
+}
+
+int
+nlm_board_eeprom_read(int node, int bus, int addr, int offs, uint8_t *buf,
+    int sz)
+{
+	int rd, i;
+	char *err = NULL;
+
+	eeprom_i2c_base = nlm_pcicfg_base(XLP_IO_I2C_OFFSET(node, bus)) +
+	    XLP_IO_PCI_HDRSZ;
+
+	if (oc_wait_on_status(OC_STATUS_BUSY) < 0) {
+		err = "Not idle";
+		goto err_exit;
+	}
+
+	/* write start */
+	if (oc_wr_cmd(addr, OC_COMMAND_START)) {
+		err = "I2C write start failed.";
+		goto err_exit;
+	}
+
+	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
+		err = "No ack after start";
+		goto err_exit_stop;
+	}
+
+	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_AL) {
+		err = "I2C Bus Arbitration Lost";
+		goto err_exit_stop;
+	}
+
+	/* Write offset */
+	if (oc_wr_cmd(offs, OC_COMMAND_WRITE)) {
+		err = "I2C write slave offset failed.";
+		goto err_exit_stop;
+	}
+
+	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
+		err = "No ack after write";
+		goto err_exit_stop;
+	}
+
+	/* read start */
+	if (oc_wr_cmd(addr | 1, OC_COMMAND_START)) {
+		err = "I2C read start failed.";
+		goto err_exit_stop;
+	}
+
+	if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
+		err = "No ack after read start";
+		goto err_exit_stop;
+	}
+	
+	for (i = 0; i < sz - 1; i++) {
+		if ((rd = oc_rd_cmd(OC_COMMAND_READ)) < 0) {
+			err = "I2C read data byte failed.";
+			goto err_exit_stop;
+		}
+	buf[i] = rd;
+	}
+
+	/* last byte */
+	if ((rd = oc_rd_cmd(OC_COMMAND_RDNACK)) < 0) {
+		err = "I2C read last data byte failed.";
+		goto err_exit_stop;
+	}
+	buf[sz - 1] = rd;
+
+err_exit_stop:
+	oc_write_reg(OC_I2C_CMD_REG, OC_COMMAND_STOP);
+	if (oc_wait_on_status(OC_STATUS_BUSY) < 0)
+		printf("%s: stop failed", __func__);
+
+err_exit:
+	if (err) {
+		printf("%s: Failed (%s)\n", __func__, err);
+		return (-1);
+	}
+	return (0);
+}
diff --git a/sys/mips/nlm/files.xlp b/sys/mips/nlm/files.xlp
index 69b1d5e..3d8bb93 100644
--- a/sys/mips/nlm/files.xlp
+++ b/sys/mips/nlm/files.xlp
@@ -9,6 +9,8 @@ mips/nlm/cms.c					standard
 mips/nlm/bus_space_rmi.c			standard
 mips/nlm/bus_space_rmi_pci.c			standard
 mips/nlm/mpreset.S				standard
+mips/nlm/board_eeprom.c				standard
+mips/nlm/board_cpld.c				standard
 mips/nlm/xlp_pci.c				optional pci
 mips/nlm/intern_dev.c				optional pci
 mips/nlm/uart_pci_xlp.c				optional uart
diff --git a/sys/mips/nlm/hal/gbu.h b/sys/mips/nlm/hal/gbu.h
new file mode 100644
index 0000000..ec5173b
--- /dev/null
+++ b/sys/mips/nlm/hal/gbu.h
@@ -0,0 +1,100 @@
+/*-
+ * Copyright (c) 2003-2012 Broadcom Corporation
+ * All Rights Reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#ifndef _NLM_HAL_GBU_H__
+#define	_NLM_HAL_GBU_H__
+
+/* Global Bus Unit (GBU) for flash Specific registers */
+
+#define	GBU_CS_BASEADDR(cs)	(0x0+cs)
+#define	GBU_CS0_BASEADDR	0x0
+#define	GBU_CS1_BASEADDR	0x1
+#define	GBU_CS2_BASEADDR	0x2
+#define	GBU_CS3_BASEADDR	0x3
+#define	GBU_CS4_BASEADDR	0x4
+#define	GBU_CS5_BASEADDR	0x5
+#define	GBU_CS6_BASEADDR	0x6
+#define	GBU_CS7_BASEADDR	0x7
+#define	GBU_CS_BASELIMIT(cs)	(0x8+cs)
+#define	GBU_CS0_BASELIMIT	0x8
+#define	GBU_CS1_BASELIMIT	0x9
+#define	GBU_CS2_BASELIMIT	0xa
+#define	GBU_CS3_BASELIMIT	0xb
+#define	GBU_CS4_BASELIMIT	0xc
+#define	GBU_CS5_BASELIMIT	0xd
+#define	GBU_CS6_BASELIMIT	0xe
+#define	GBU_CS7_BASELIMIT	0xf
+#define	GBU_CS_DEVPARAM(cs)	(0x10+cs)
+#define	GBU_CS0_DEVPARAM	0x10
+#define	GBU_CS1_DEVPARAM	0x11
+#define	GBU_CS2_DEVPARAM	0x12
+#define	GBU_CS3_DEVPARAM	0x13
+#define	GBU_CS4_DEVPARAM	0x14
+#define	GBU_CS5_DEVPARAM	0x15
+#define	GBU_CS6_DEVPARAM	0x16
+#define	GBU_CS7_DEVPARAM	0x17
+#define	GBU_CS_DEVTIME0(cs)	(0x18+cs)
+#define	GBU_CS0_DEVTIME0	0x18
+#define	GBU_CS1_DEVTIME0	0x1a
+#define	GBU_CS2_DEVTIME0	0x1c
+#define	GBU_CS3_DEVTIME0	0x1e
+#define	GBU_CS4_DEVTIME0	0x20
+#define	GBU_CS5_DEVTIME0	0x22
+#define	GBU_CS6_DEVTIME0	0x24
+#define	GBU_CS7_DEVTIME0	0x26
+#define	GBU_CS_DEVTIME1(cs)	(0x19+cs)
+#define	GBU_CS0_DEVTIME1	0x19
+#define	GBU_CS1_DEVTIME1	0x1b
+#define	GBU_CS2_DEVTIME1	0x1d
+#define	GBU_CS3_DEVTIME1	0x1f
+#define	GBU_CS4_DEVTIME1	0x21
+#define	GBU_CS5_DEVTIME1	0x23
+#define	GBU_CS6_DEVTIME1	0x25
+#define	GBU_CS7_DEVTIME1	0x27
+#define	GBU_SYSCTRL		0x28
+#define	GBU_BYTESWAP		0x29
+#define	GBU_DI_TIMEOUT_VAL	0x2d
+#define	GBU_INTSTAT		0x2e
+#define	GBU_INTEN		0x2f
+#define	GBU_STATUS		0x30
+#define	GBU_ERRLOG0		0x2a
+#define	GBU_ERRLOG1		0x2b
+#define	GBU_ERRLOG2		0x2c
+
+#if !defined(LOCORE) && !defined(__ASSEMBLY__)
+
+#define	nlm_read_gbu_reg(b, r)		nlm_read_reg(b, r)
+#define	nlm_write_gbu_reg(b, r, v)	nlm_write_reg(b, r, v)
+#define	nlm_get_gbu_pcibase(node)	\
+				nlm_pcicfg_base(XLP_IO_NOR_OFFSET(node))
+#define	nlm_get_gbu_regbase(node)	\
+				(nlm_get_gbu_pcibase(node) + XLP_IO_PCI_HDRSZ)
+
+#endif /* !LOCORE && !__ASSEMBLY__ */
+#endif /* _NLM_HAL_GBU_H__ */
diff --git a/sys/mips/nlm/msgring.h b/sys/mips/nlm/msgring.h
index cf5f66e..446bad8 100644
--- a/sys/mips/nlm/msgring.h
+++ b/sys/mips/nlm/msgring.h
@@ -29,12 +29,17 @@
  * $FreeBSD$
  */
 
+#ifndef _NLM_MSGRING_H
+#define	_NLM_MSGRING_H
 #define	CMS_DEFAULT_CREDIT	50
-
 extern uint32_t xlp_msg_thread_mask;
+
+struct nlm_fmn_msg;
 typedef void (*msgring_handler)(int, int, int, int, struct nlm_fmn_msg *, void *);
+
 int register_msgring_handler(int startb, int endb, msgring_handler action,
 		                    void *arg);
 int xlp_handle_msg_vc(u_int vcmask, int max_msgs);
 void xlp_msgring_cpu_init(int, int, int);
 void xlp_cms_enable_intr(int , int , int , int);
+#endif /* _NLM_MSGRING_H */