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author | imp <imp@FreeBSD.org> | 2010-07-14 00:41:22 +0000 |
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committer | imp <imp@FreeBSD.org> | 2010-07-14 00:41:22 +0000 |
commit | d61b3ca80aa1f62fea4a08ff88c607bb44be20ae (patch) | |
tree | 49b4fca5a2d9a1e9574b6ff2fe170edd677f1161 /sys/mips/mips/mpboot.S | |
parent | c07c5231a154f8805d3b84e86f86f2c2c8f8a25b (diff) | |
download | FreeBSD-src-d61b3ca80aa1f62fea4a08ff88c607bb44be20ae.zip FreeBSD-src-d61b3ca80aa1f62fea4a08ff88c607bb44be20ae.tar.gz |
Prefer the cpuregs.h spellings of register and bit names over cpu.h.
Diffstat (limited to 'sys/mips/mips/mpboot.S')
-rw-r--r-- | sys/mips/mips/mpboot.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/mips/mips/mpboot.S b/sys/mips/mips/mpboot.S index 1329d45..76a4c8e 100644 --- a/sys/mips/mips/mpboot.S +++ b/sys/mips/mips/mpboot.S @@ -38,23 +38,23 @@ #ifdef TARGET_OCTEON #define CLEAR_STATUS \ - mfc0 a0, COP_0_STATUS_REG ;\ + mfc0 a0, MIPS_COP_0_STATUS ;\ li a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \ or a0, a0, a2 ; \ - li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER | MIPS_SR_BEV) ; \ + li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER | MIPS_SR_BEV) ; \ and a0, a0, a2 ; \ - mtc0 a0, COP_0_STATUS_REG + mtc0 a0, MIPS_COP_0_STATUS #else #define CLEAR_STATUS \ - mtc0 zero, COP_0_STATUS_REG + mtc0 zero, MIPS_COP_0_STATUS #endif GLOBAL(mpentry) CLEAR_STATUS /* disable interrupts */ - mtc0 zero, COP_0_CAUSE_REG /* clear soft interrupts */ + mtc0 zero, MIPS_COP_0_CAUSE /* clear soft interrupts */ - li t0, CFG_K0_CACHED /* make sure kseg0 is cached */ + li t0, MIPS_CCA_CNC /* make sure kseg0 is cached */ mtc0 t0, MIPS_COP_0_CONFIG COP0_SYNC |