diff options
author | jchandra <jchandra@FreeBSD.org> | 2011-11-18 09:30:24 +0000 |
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committer | jchandra <jchandra@FreeBSD.org> | 2011-11-18 09:30:24 +0000 |
commit | ed098cf42083c6e4b4760129a932b9d19cf35a7e (patch) | |
tree | efe76a499807f19ba7e7ce24b05ec445a3763639 /sys/mips/include | |
parent | b49a65685440a2621d5d334b580d98b6d2e934a7 (diff) | |
download | FreeBSD-src-ed098cf42083c6e4b4760129a932b9d19cf35a7e.zip FreeBSD-src-ed098cf42083c6e4b4760129a932b9d19cf35a7e.tar.gz |
Fix COP0 hazards for XLR and XLP
The XLR CPUs do not have any software visible hazards for COP0 operations.
On XLP the hazard is a ehb, since it is mips64r2.
Diffstat (limited to 'sys/mips/include')
-rw-r--r-- | sys/mips/include/asm.h | 9 | ||||
-rw-r--r-- | sys/mips/include/cpufunc.h | 2 | ||||
-rw-r--r-- | sys/mips/include/cpuregs.h | 2 |
3 files changed, 12 insertions, 1 deletions
diff --git a/sys/mips/include/asm.h b/sys/mips/include/asm.h index 82d8837..12149c7 100644 --- a/sys/mips/include/asm.h +++ b/sys/mips/include/asm.h @@ -855,6 +855,15 @@ _C_LABEL(x): * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture * For Programmers Volume III: The MIPS32 Privileged Resource Architecture" */ +#if defined(CPU_NLM) +#define HAZARD_DELAY sll $0,3 +#define ITLBNOPFIX sll $0,3 +#elif defined(CPU_RMI) +#define HAZARD_DELAY +#define ITLBNOPFIX +#else #define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;nop; #define HAZARD_DELAY nop;nop;nop;nop;nop; +#endif + #endif /* !_MACHINE_ASM_H_ */ diff --git a/sys/mips/include/cpufunc.h b/sys/mips/include/cpufunc.h index f5c24b4..02311cb 100644 --- a/sys/mips/include/cpufunc.h +++ b/sys/mips/include/cpufunc.h @@ -69,7 +69,7 @@ static __inline void mips_barrier(void) { -#ifdef CPU_CNMIPS +#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) __asm __volatile("" : : : "memory"); #else __asm __volatile (".set noreorder\n\t" diff --git a/sys/mips/include/cpuregs.h b/sys/mips/include/cpuregs.h index 01d710d..b47b264 100644 --- a/sys/mips/include/cpuregs.h +++ b/sys/mips/include/cpuregs.h @@ -200,6 +200,8 @@ /* CPU dependent mtc0 hazard hook */ #if defined(CPU_CNMIPS) || defined(CPU_RMI) #define COP0_SYNC +#elif defined(CPU_NLM) +#define COP0_SYNC .word 0xc0 /* ehb */ #elif defined(CPU_SB1) #define COP0_SYNC ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop #else |