o) Use inline functions to access coprocessor 0 registers rather than external

   ones implemented using assembly.
o) Use TRAPF_USERMODE() consistently rather than USERMODE().  Eliminate
   <machine/psl.h> as a result.
o) Use intr_*() rather than *intr(), consistently.
o) Use register_t instead of u_int in some trap code.
o) Merge some more endian-related macros to machine/asm.h from NetBSD.
o) Add PTR_LI macro, which loads an address with the correct sign-extension for
   a pointer.
o) Restore interrupts when bailing out due to an excessive IRQ in
   nexus_setup_intr().
o) Remove unused functions from psraccess.S.
o) Enter temporary virtual entries for large memory access into the page tables
   rather than simply hoping they stay resident in the TLB and we don't need to
   do a refill for them.
o) Abstract out large memory mapping setup/teardown using some macros.
o) Do mips_dcache_wbinv_range() when using temporary virtual addresses just
   like we do when we can use the direct map.

1 files changed, 6 insertions, 15 deletions

diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h
index 1ec1cfc..5c5e5e5 100644
--- a/sys/mips/include/cpu.h
+++ b/sys/mips/include/cpu.h
@@ -47,7 +47,6 @@
 #ifndef _MACHINE_CPU_H_
 #define	_MACHINE_CPU_H_
 
-#include <machine/psl.h>
 #include <machine/endian.h>
 
 #define MIPS_KSEG0_LARGEST_PHYS         0x20000000
@@ -334,6 +333,7 @@
 #define	cpu_swapout(p)		panic("cpu_swapout: can't get here");
 
 #ifndef _LOCORE
+#include <machine/cpufunc.h>
 #include <machine/frame.h>
 /*
  * Arguments to hardclock and gatherstats encapsulate the previous
@@ -342,7 +342,6 @@
 #define	clockframe trapframe	/* Use normal trap frame */
 
 #define	CLKF_USERMODE(framep)	((framep)->sr & SR_KSU_USER)
-#define	CLKF_BASEPRI(framep)	((framep)->cpl == 0)
 #define	CLKF_PC(framep)		((framep)->pc)
 #define	CLKF_INTR(framep)	(0)
 #define	MIPS_CLKF_INTR()	(intr_nesting_level >= 1)
@@ -351,6 +350,11 @@
 #define	cpu_getstack(td)	((td)->td_frame->sp)
 
 /*
+ * A machine-independent interface to the CPU's counter.
+ */
+#define	get_cyclecount()	mips_rd_count()
+
+/*
  * CPU identification, from PRID register.
  */
 union cpuprid {
@@ -542,18 +546,6 @@ extern int intr_nesting_level;
  *  Low level access routines to CPU registers
  */
 
-void setsoftintr0(void);
-void clearsoftintr0(void);
-void setsoftintr1(void);
-void clearsoftintr1(void);
-
-
-u_int32_t mips_cp0_status_read(void);
-void mips_cp0_status_write(u_int32_t);
-
-int disableintr(void);
-void restoreintr(int);
-int enableintr(void);
 int Mips_TLBGetPID(void);
 
 void swi_vm(void *);
@@ -562,7 +554,6 @@ void cpu_reset(void);
 
 u_int32_t set_intr_mask(u_int32_t);
 u_int32_t get_intr_mask(void);
-u_int32_t get_cyclecount(void);
 
 #define	cpu_spinwait()		/* nothing */