Initial (unfinished!) AR933x support.

4 files changed, 362 insertions, 0 deletions

diff --git a/sys/mips/conf/AP121 b/sys/mips/conf/AP121
new file mode 100644
index 0000000..677d725
--- /dev/null
+++ b/sys/mips/conf/AP121
@@ -0,0 +1,50 @@
+#
+# AP121 - the AP121 reference board from Qualcomm Atheros includes:
+#
+# * AR9330 SoC
+# * 16MB RAM
+# * 4MB flash
+# * Integrated 1x1 2GHz wifi and 10/100 bridge
+#
+# $FreeBSD$
+#
+
+# Include the default AR933x parameters
+include         "AR933X_BASE"
+
+ident           AP121
+
+# Override hints with board values
+hints           "AP121.hints"
+
+# Force the board memory - the base AP121 only has 16MB RAM
+options         AR71XX_REALMEM=16*1024*1024
+
+# i2c GPIO bus
+#device		gpioiic
+#device		iicbb
+#device		iicbus
+#device		iic
+
+# ethernet switch device
+#device		etherswitch
+
+# RTL8366RB support
+#device		rtl8366rb
+
+# read MSDOS formatted disks - USB
+#options		MSDOSFS
+
+# Enable the uboot environment stuff rather then the
+# redboot stuff.
+options		AR71XX_ENV_UBOOT
+
+# uzip - to boot natively from flash
+#device		geom_uzip
+#options		GEOM_UZIP
+
+# Used for the static uboot partition map
+device          geom_map
+
+# Boot off of the rootfs, as defined in the geom_map setup.
+options		ROOTDEVNAME=\"ufs:map/rootfs.uzip\"
diff --git a/sys/mips/conf/AP121.hints b/sys/mips/conf/AP121.hints
new file mode 100644
index 0000000..f6c3d14
--- /dev/null
+++ b/sys/mips/conf/AP121.hints
@@ -0,0 +1,130 @@
+#
+# This file adds to the values in AR91XX_BASE.hints.
+#
+# $FreeBSD$
+
+# Hard-code the PHY for now, until there's switch phy support.
+# hint.arge.0.phymask=0x000c
+hint.arge.0.phymask=0x0000
+hint.arge.0.media=1000
+hint.arge.0.fduplex=1
+# Where is the MAC address stored in flash for this particular unit.
+hint.arge.0.eeprommac=0x1f01fc00
+
+# This isn't used, but configure it anyway.
+# This should eventually just not be configured, but the if then
+# needs to be properly disabled or spurious interrupts occur.
+hint.arge.1.phymask=0x0
+
+# Where the ART is
+# hint.ath.0.eepromaddr=0x1fff1000
+
+# The AP121 4MB flash layout:
+#
+# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
+#    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
+#    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
+#
+# So:
+# 256k: uboot
+# 64: uboot-env
+# 2752k: rootfs
+# 896k: kernel
+# 64k: config
+# 64k: ART
+
+hint.map.0.at="flash/spi0"
+hint.map.0.start=0x00000000
+hint.map.0.end=0x000040000
+hint.map.0.name="uboot"
+hint.map.0.readonly=1
+
+hint.map.1.at="flash/spi0"
+hint.map.1.start=0x00040000
+hint.map.1.end=0x00050000
+hint.map.1.name="uboot-env"
+hint.map.1.readonly=0
+
+hint.map.2.at="flash/spi0"
+hint.map.2.start=0x00050000
+hint.map.2.end=0x00300000
+hint.map.2.name="rootfs"
+hint.map.2.readonly=0
+
+hint.map.3.at="flash/spi0"
+hint.map.3.start=0x00300000
+hint.map.3.end=0x003e0000
+hint.map.3.name="kernel"
+hint.map.3.readonly=0
+
+hint.map.4.at="flash/spi0"
+hint.map.4.start=0x003e0000
+hint.map.4.end=0x003f0000
+hint.map.4.name="cfg"
+hint.map.4.readonly=0
+
+# This is radio calibration section.  It is (or should be!) unique
+# for each board, to take into account thermal and electrical differences
+# as well as the regulatory compliance data.
+#
+hint.map.5.at="flash/spi0"
+hint.map.5.start=0x003f0000
+hint.map.5.end=0x00400000
+hint.map.5.name="art"
+hint.map.5.readonly=1
+
+# GPIO specific configuration block
+
+# Don't flip on anything that isn't already enabled.
+# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
+# not used here.
+hint.gpio.0.function_set=0x00002000
+hint.gpio.0.function_clear=0x00000000
+
+# These are the GPIO LEDs and buttons which can be software controlled.
+#hint.gpio.0.pinmask=0x001c02ae
+hint.gpio.0.pinmask=0x0
+
+# pin 1 - USB (LED)
+# pin 2 - System (LED)
+# Pin 3 - Reset (input)
+# Pin 5 - QSS (LED)
+# Pin 7 - QSS Button (input)
+# Pin 8 - wired into the chip reset line
+# Pin 9 - WLAN
+# Pin 10 - UART TX (not GPIO)
+# Pin 13 - UART RX (not GPIO)
+# Pin 18 - RTL8366RB switch data line
+# Pin 19 - RTL8366RB switch clock line
+# Pin 20 - "GPIO20"
+
+# LEDs are configured separately and driven by the LED device
+#hint.gpioled.0.at="gpiobus0"
+#hint.gpioled.0.name="usb"
+#hint.gpioled.0.pins=0x0002
+
+#hint.gpioled.1.at="gpiobus0"
+#hint.gpioled.1.name="system"
+#hint.gpioled.1.pins=0x0004
+
+#hint.gpioled.2.at="gpiobus0"
+#hint.gpioled.2.name="qss"
+#hint.gpioled.2.pins=0x0020
+
+#hint.gpioled.3.at="gpiobus0"
+#hint.gpioled.3.name="wlan"
+#hint.gpioled.3.pins=0x0200
+
+# GPIO I2C bus
+#hint.gpioiic.0.at="gpiobus0"
+#hint.gpioiic.0.pins=0xc0000
+#hint.gpioiic.0.scl=1
+#hint.gpioiic.0.sda=0
+
+# I2C bus
+# Don't be strict about I2C protocol - the relaxed semantics are required
+# by the realtek switch PHY.
+# hint.iicbus.0.strict=0
+
+# Bit bang bus - override default delay
+#hint.iicbb.0.udelay=3
diff --git a/sys/mips/conf/AR933X_BASE b/sys/mips/conf/AR933X_BASE
new file mode 100644
index 0000000..b0124a9
--- /dev/null
+++ b/sys/mips/conf/AR933X_BASE
@@ -0,0 +1,123 @@
+#
+# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC.
+#
+# This file (and the hints file accompanying it) are not designed to be
+# used by themselves. Instead, users of this file should create a kernel
+# config file which includes this file (which gets the basic hints), then
+# override the default options (adding devices as needed) and adding
+# hints as needed (for example, the GPIO and LAN PHY.)
+#
+# $FreeBSD$
+#
+
+machine         mips mips
+ident		AR933X_BASE
+cpu		CPU_MIPS4KC
+makeoptions	KERNLOADADDR=0x80050000
+options		HZ=1000
+
+files		"../atheros/files.ar71xx"
+hints		"AR933X_BASE.hints"
+
+makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
+# makeoptions	MODULES_OVERRIDE="random gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_ahb hwpmc"
+makeoptions	MODULES_OVERRIDE=""
+
+options		DDB
+options		KDB
+options 	ALQ
+
+options		SCHED_4BSD		#4BSD scheduler
+options		INET			#InterNETworking
+#options		INET6			#InterNETworking
+#options		NFSCL			#Network Filesystem Client
+options		PSEUDOFS		#Pseudo-filesystem framework
+options		_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
+
+# Don't include the SCSI/CAM strings in the default build
+options 	SCSI_NO_SENSE_STRINGS
+options 	SCSI_NO_OP_STRINGS
+
+# .. And no sysctl strings
+options 	NO_SYSCTL_DESCR
+
+# Limit IO size
+options		NBUF=128
+
+# Limit UMTX hash size
+options		UMTX_NUM_CHAINS=64
+
+# PMC
+#options		HWPMC_HOOKS
+#device		hwpmc
+#device		hwpmc_mips24k
+
+# options		NFS_LEGACYRPC
+# Debugging for use in -current
+#options		INVARIANTS
+#options		INVARIANT_SUPPORT
+#options		WITNESS
+#options		WITNESS_SKIPSPIN
+options		FFS                     #Berkeley Fast Filesystem
+#options		SOFTUPDATES             #Enable FFS soft updates support
+#options		UFS_ACL                 #Support for access control lists
+#options		UFS_DIRHASH             #Improve performance on big directories
+options		NO_FFS_SNAPSHOT		# We don't require snapshot support
+
+# Wireless NIC cards
+options		IEEE80211_DEBUG
+options		IEEE80211_SUPPORT_MESH
+options		IEEE80211_SUPPORT_TDMA
+options		IEEE80211_SUPPORT_SUPERG
+options 	IEEE80211_ALQ	# 802.11 ALQ logging support
+#device		wlan            # 802.11 support
+#device		wlan_wep        # 802.11 WEP support
+#device		wlan_ccmp       # 802.11 CCMP support
+#device		wlan_tkip       # 802.11 TKIP support
+#device		wlan_xauth	# 802.11 hostap support
+
+# ath(4)
+#device		ath             # Atheros network device
+#device		ath_rate_sample
+#device		ath_ahb		# Atheros host bus glue
+options 	ATH_DEBUG
+options		ATH_DIAGAPI
+option		ATH_ENABLE_11N
+option 		AH_DEBUG_ALQ
+
+# device		ath_hal
+options		AH_DEBUG
+option		AH_SUPPORT_AR5416
+option		AH_SUPPORT_AR9130	# Makes other chipsets not function!
+option 		AH_DEBUG_ALQ
+option		AH_AR5416_INTERRUPT_MITIGATION
+
+device		mii
+device		arge
+
+device		usb
+options		USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
+options		USB_DEBUG
+options		USB_HOST_ALIGN=32		# AR71XX (MIPS in general?) requires this
+device		ehci
+
+device		scbus
+device		umass
+device		da
+
+device		spibus
+device		ar71xx_spi
+device		mx25l
+device		ar71xx_wdog
+
+device		uart
+device		uart_ar933x
+
+device		loop
+device		ether
+device		md
+device		bpf
+device		random
+device		if_bridge
+device		gpio
+device		gpioled
diff --git a/sys/mips/conf/AR933X_BASE.hints b/sys/mips/conf/AR933X_BASE.hints
new file mode 100644
index 0000000..1cc638d
--- /dev/null
+++ b/sys/mips/conf/AR933X_BASE.hints
@@ -0,0 +1,59 @@
+# This file (and the kernel config file accompanying it) are not designed 
+# to be used by themselves. Instead, users of this file should create a
+# kernel # config file which includes this file (which gets the basic hints),
+# then override the default options (adding devices as needed) and adding
+# hints as needed (for example, the GPIO and LAN PHY.)
+
+# $FreeBSD$
+
+hint.apb.0.at="nexus0"
+hint.apb.0.irq=4
+
+# uart0
+hint.uart.0.at="apb0"
+# NB: This isn't an ns8250 UART
+hint.uart.0.maddr=0x18020000
+hint.uart.0.msize=0x18
+hint.uart.0.irq=3
+
+#ehci - note the 0x100 offset for the AR913x/AR724x
+hint.ehci.0.at="nexus0"
+hint.ehci.0.maddr=0x1b000100
+hint.ehci.0.msize=0x00ffff00
+hint.ehci.0.irq=1
+
+hint.arge.0.at="nexus0"
+hint.arge.0.maddr=0x19000000
+hint.arge.0.msize=0x1000
+hint.arge.0.irq=2
+
+hint.arge.1.at="nexus0"
+hint.arge.1.maddr=0x1a000000
+hint.arge.1.msize=0x1000
+hint.arge.1.irq=3
+
+# XXX The ath device hangs off of the AHB, rather than the Nexus.
+hint.ath.0.at="nexus0"
+hint.ath.0.maddr=0x18100000
+hint.ath.0.msize=0x20000
+hint.ath.0.irq=0
+# Set this to define where the ath calibration data
+# should be fetched from in physical memory.
+# hint.ath.0.eepromaddr=0x1fff1000
+
+# SPI flash
+hint.spi.0.at="nexus0"
+hint.spi.0.maddr=0x1f000000
+hint.spi.0.msize=0x10
+
+hint.mx25l.0.at="spibus0"
+hint.mx25l.0.cs=0
+
+# Watchdog
+hint.ar71xx_wdog.0.at="nexus0"
+
+# The GPIO function and pin mask is configured per-board
+hint.gpio.0.at="apb0"
+hint.gpio.0.maddr=0x18040000
+hint.gpio.0.msize=0x1000
+hint.gpio.0.irq=2