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authorrwatson <rwatson@FreeBSD.org>2012-08-25 12:02:13 +0000
committerrwatson <rwatson@FreeBSD.org>2012-08-25 12:02:13 +0000
commited5bc52cd31c1c95121758aa5ae13e0125a4f2e6 (patch)
treeed55863b946e84e31dff32406a24073b7a562c38 /sys/mips/conf
parent65defd2853b9f3cfb5c5d4a3dddadaa7dcaff75f (diff)
downloadFreeBSD-src-ed5bc52cd31c1c95121758aa5ae13e0125a4f2e6.zip
FreeBSD-src-ed5bc52cd31c1c95121758aa5ae13e0125a4f2e6.tar.gz
Add reference kernel configurations for FreeBSD/beri in simulation, on the
Terasic DE-4, and Terasic tPad Altera-based boards. Sponsored by: DARPA, AFRL
Diffstat (limited to 'sys/mips/conf')
-rw-r--r--sys/mips/conf/BERI_DE4.hints72
-rw-r--r--sys/mips/conf/BERI_DE4_MDROOT28
-rw-r--r--sys/mips/conf/BERI_DE4_SDROOT21
-rw-r--r--sys/mips/conf/BERI_SIM.hints26
-rw-r--r--sys/mips/conf/BERI_SIM_MDROOT25
-rw-r--r--sys/mips/conf/BERI_TEMPLATE58
-rw-r--r--sys/mips/conf/BERI_TPAD.hints51
7 files changed, 281 insertions, 0 deletions
diff --git a/sys/mips/conf/BERI_DE4.hints b/sys/mips/conf/BERI_DE4.hints
new file mode 100644
index 0000000..319d0c2
--- /dev/null
+++ b/sys/mips/conf/BERI_DE4.hints
@@ -0,0 +1,72 @@
+# $FreeBSD$
+
+#
+# Altera JTAG UARTs configured for console, debugging, and data putput on the
+# Terasic DE-4.
+#
+hint.altera_jtag_uart.0.at="nexus0"
+hint.altera_jtag_uart.0.maddr=0x7f000000
+hint.altera_jtag_uart.0.msize=0x40
+hint.altera_jtag_uart.0.irq=0
+
+hint.altera_jtag_uart.1.at="nexus0"
+hint.altera_jtag_uart.1.maddr=0x7f001000
+hint.altera_jtag_uart.1.msize=0x40
+
+hint.altera_jtag_uart.2.at="nexus0"
+hint.altera_jtag_uart.2.maddr=0x7f002000
+hint.altera_jtag_uart.2.msize=0x40
+
+#
+# On-board DE4 and tPad SD Card IP core
+#
+hint.altera_sdcardc.0.at="nexus0"
+hint.altera_sdcardc.0.maddr=0x7f008000
+hint.altera_sdcardc.0.msize=0x400
+
+#
+# BERI Hardware Version ROM
+#
+hint.altera_avgen.0.at="nexus0"
+hint.altera_avgen.0.maddr=0x7F00A000
+hint.altera_avgen.0.msize=20
+hint.altera_avgen.0.width=4
+hint.altera_avgen.0.fileio="rw"
+hint.altera_avgen.0.devname="berirom"
+
+#
+# Expose the DE4 flash via an Avalon "generic" device.
+# This is incompatible with the isf(4) driver.
+#
+#hint.altera_avgen.0.at="nexus0"
+#hint.altera_avgen.0.maddr=0x74000000
+#hint.altera_avgen.0.msize=0x4000000
+#hint.altera_avgen.0.width=2
+#hint.altera_avgen.0.fileio="rw"
+#hint.altera_avgen.0.mmapio="rwx"
+#hint.altera_avgen.0.devname="de4flash"
+
+# Reserved configuration blocks. Don't touch.
+hint.map.0.at="isf0"
+hint.map.0.start=0x00000000
+hint.map.0.end=0x00020000
+hint.map.0.name="config"
+hint.map.0.readonly=1
+
+# Hardwired location of bitfile
+hint.map.1.at="isf0"
+hint.map.1.start=0x00020000
+hint.map.1.end=0x01820000
+hint.map.1.name="fpga"
+
+# Kernel on first chip
+hint.map.2.at="isf0"
+hint.map.2.start=0x01820000
+hint.map.2.end=0x02000000
+hint.map.2.name="reserved"
+
+# The second chip
+hint.map.3.at="isf1"
+hint.map.3.start=0x00000000
+hint.map.3.end=0x02000000
+hint.map.3.name="kernel"
diff --git a/sys/mips/conf/BERI_DE4_MDROOT b/sys/mips/conf/BERI_DE4_MDROOT
new file mode 100644
index 0000000..c75ced1
--- /dev/null
+++ b/sys/mips/conf/BERI_DE4_MDROOT
@@ -0,0 +1,28 @@
+#
+# BERI_DE4 -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC
+# Implementation) FPGA soft core, as configured in its Terasic DE-4 reference
+# configuration.
+#
+# $FreeBSD$
+#
+
+include "BERI_TEMPLATE"
+
+ident BERI_DE4_MDROOT
+
+hints "BERI_DE4.hints" #Default places to look for devices.
+
+#
+# This kernel configuration uses an embedded 8MB memory root file system.
+# Adjust the following path based on local requirements.
+#
+options MD_ROOT # MD is a potential root device
+options MD_ROOT_SIZE=8192
+makeoptions MFS_IMAGE=/local/scratch/rnw24/mdroot.img
+options ROOTDEVNAME=\"ufs:md0\"
+
+device altera_avgen
+device altera_jtag_uart
+device altera_sdcard
+
+device sc
diff --git a/sys/mips/conf/BERI_DE4_SDROOT b/sys/mips/conf/BERI_DE4_SDROOT
new file mode 100644
index 0000000..8703acf
--- /dev/null
+++ b/sys/mips/conf/BERI_DE4_SDROOT
@@ -0,0 +1,21 @@
+#
+# BERI_DE4 -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC
+# Implementation) FPGA soft core, as configured in its Terasic DE-4 reference
+# configuration.
+#
+# $FreeBSD$
+#
+
+include "BERI_TEMPLATE"
+
+ident BERI_DE4_SDROOT
+
+hints "BERI_DE4.hints" #Default places to look for devices.
+
+options ROOTDEVNAME=\"ufs:altera_sdcard0\"
+
+device altera_avgen
+device altera_jtag_uart
+device altera_sdcard
+
+device sc
diff --git a/sys/mips/conf/BERI_SIM.hints b/sys/mips/conf/BERI_SIM.hints
new file mode 100644
index 0000000..342d94f
--- /dev/null
+++ b/sys/mips/conf/BERI_SIM.hints
@@ -0,0 +1,26 @@
+# $FreeBSD$
+
+#
+# Altera JTAG UARTs configured for console, debugging, and data putput on the
+# BERI simulator.
+#
+hint.altera_jtag_uart.0.at="nexus0"
+hint.altera_jtag_uart.0.maddr=0x7f000000
+hint.altera_jtag_uart.0.msize=0x40
+hint.altera_jtag_uart.0.irq=0
+
+hint.altera_jtag_uart.1.at="nexus0"
+hint.altera_jtag_uart.1.maddr=0x7f001000
+hint.altera_jtag_uart.1.msize=0x40
+
+hint.altera_jtag_uart.2.at="nexus0"
+hint.altera_jtag_uart.2.maddr=0x7f002000
+hint.altera_jtag_uart.2.msize=0x40
+
+#
+# On-board DE4 and tPad SD Card IP core -- also present in Bluespec
+# simulation.
+#
+hint.altera_sdcardc.0.at="nexus0"
+hint.altera_sdcardc.0.maddr=0x7f008000
+hint.altera_sdcardc.0.msize=0x400
diff --git a/sys/mips/conf/BERI_SIM_MDROOT b/sys/mips/conf/BERI_SIM_MDROOT
new file mode 100644
index 0000000..a8f2a41
--- /dev/null
+++ b/sys/mips/conf/BERI_SIM_MDROOT
@@ -0,0 +1,25 @@
+#
+# BERI_SIM -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC
+# Implementation) FPGA soft core, as configured for simulation.
+#
+# $FreeBSD$
+#
+
+include "BERI_TEMPLATE"
+
+ident BERI_SIM_MDROOT
+
+hints "BERI_SIM.hints" #Default places to look for devices.
+
+#
+# This kernel configuration uses an embedded 8MB memory root file system.
+# Adjust the following path based on local requirements.
+#
+options MD_ROOT # MD is a potential root device
+options MD_ROOT_SIZE=8192
+makeoptions MFS_IMAGE=/local/scratch/rnw24/mdroot.img
+options ROOTDEVNAME=\"ufs:md0\"
+
+device altera_avgen
+device altera_jtag_uart
+device altera_sdcard
diff --git a/sys/mips/conf/BERI_TEMPLATE b/sys/mips/conf/BERI_TEMPLATE
new file mode 100644
index 0000000..f4d53ca
--- /dev/null
+++ b/sys/mips/conf/BERI_TEMPLATE
@@ -0,0 +1,58 @@
+#
+# BERI_TEMPLATE -- a template kernel configuration for the SRI/Cambridge
+# "BERI" (Bluespec Extensible RISC Implementation) FPGA soft core CPU. This
+# kernel configuration file will be included by other board-specific files,
+# and so contains only BERI features common across all board targets.
+#
+# $FreeBSD$
+#
+
+ident BERI_TEMPLATE
+
+machine mips mips64
+
+cpu CPU_BERI
+
+options HZ=200
+
+makeoptions ARCH_FLAGS="-march=mips64 -mabi=64"
+
+makeoptions KERNLOADADDR=0xffffffff80100000
+
+include "../beri/std.beri"
+
+makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
+
+makeoptions MODULES_OVERRIDE=""
+
+options DDB
+options KDB
+options ALT_BREAK_TO_DEBUGGER
+options KTRACE
+
+options CAPABILITY_MODE
+options CAPABILITIES
+
+options SCHED_ULE
+
+options FFS #Berkeley Fast Filesystem
+
+options INET
+options INET6
+options NFSCL
+options NFS_ROOT
+
+# Debugging for use in -current
+#options DEADLKRES #Enable the deadlock resolver
+options INVARIANTS #Enable calls of extra sanity checking
+options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS
+#options WITNESS #Enable checks to detect deadlocks and cycles
+#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
+
+device geom_map
+
+device md
+device ether
+device loop
+device random
+device snp
diff --git a/sys/mips/conf/BERI_TPAD.hints b/sys/mips/conf/BERI_TPAD.hints
new file mode 100644
index 0000000..a890c84
--- /dev/null
+++ b/sys/mips/conf/BERI_TPAD.hints
@@ -0,0 +1,51 @@
+# $FreeBSD$
+
+#
+# Altera JTAG UARTs configured for console, debugging, and data putput on the
+# Terasic tPad.
+#
+hint.altera_jtag_uart.0.at="nexus0"
+hint.altera_jtag_uart.0.maddr=0x7f000000
+hint.altera_jtag_uart.0.msize=0x40
+hint.altera_jtag_uart.0.irq=0
+
+hint.altera_jtag_uart.1.at="nexus0"
+hint.altera_jtag_uart.1.maddr=0x7f001000
+hint.altera_jtag_uart.1.msize=0x40
+
+hint.altera_jtag_uart.2.at="nexus0"
+hint.altera_jtag_uart.2.maddr=0x7f002000
+hint.altera_jtag_uart.2.msize=0x40
+
+#
+# Expose the tPad touchscreen device via an Avalon "generic" device. Observe
+# that this is a portion of DRAM, so some care may be required in how memory
+# is exposed to FreeBSD to avoid use of that DRAM for both the touch screen
+# and FreeBSD use.
+#
+# Two separate devices are used here because alignment/width requirements for
+# I/O differ: the frame buffer accepts 16-bit I/O, and the touch input device
+# requires 32-bit I/O.
+#
+hint.altera_avgen.0.at="nexus0"
+hint.altera_avgen.0.maddr=0x04000000
+hint.altera_avgen.0.msize=0x01000000
+hint.altera_avgen.0.width=2
+hint.altera_avgen.0.fileio="rw"
+hint.altera_avgen.0.mmapio="rw"
+hint.altera_avgen.0.devname="display"
+
+hint.altera_avgen.1.at="nexus0"
+hint.altera_avgen.1.maddr=0x05000000
+hint.altera_avgen.1.msize=0x00000020
+hint.altera_avgen.1.width=4
+hint.altera_avgen.1.fileio="rw"
+hint.altera_avgen.1.mmapio="rw"
+hint.altera_avgen.1.devname="touch"
+
+#
+# On-board DE4 and tPad SD Card IP core
+#
+hint.altera_sdcardc.0.at="nexus0"
+hint.altera_sdcardc.0.maddr=0x7f008000
+hint.altera_sdcardc.0.msize=0x400
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