Add the QCA9533 base configuration file and an example configuration

for the AP143.

Wifi doesn't work on the QCA9533 board, but basic ethernet/ethernet
and ethernet switch support does work.

The AP143 has 32MB RAM and 4MB flash, so this was tested with a USB
rootfs.

Tested:

* QCA9533v2, AP143 reference design board.

4 files changed, 369 insertions, 0 deletions

diff --git a/sys/mips/conf/AP143 b/sys/mips/conf/AP143
new file mode 100644
index 0000000..296f0c8
--- /dev/null
+++ b/sys/mips/conf/AP143
@@ -0,0 +1,51 @@
+#
+# AP143 - the AP143 reference board from Qualcomm Atheros includes:
+#
+# * AR9330 SoC
+# * 32MB RAM
+# * 4MB flash
+# * Integrated 1x1 2GHz wifi and 10/100 bridge
+#
+# $FreeBSD$
+#
+
+# Include the default QCA953x parameters
+include         "QCA953X_BASE"
+
+ident           AP143
+
+# Override hints with board values
+hints           "AP143.hints"
+
+# Force the board memory - the base AP121 only has 16MB RAM
+options         AR71XX_REALMEM=(32*1024*1024)
+
+# i2c GPIO bus
+#device		gpioiic
+#device		iicbb
+#device		iicbus
+#device		iic
+
+# Options required for miiproxy and mdiobus
+options 	ARGE_MDIO	# Export an MDIO bus separate from arge
+device		miiproxy	# MDIO bus <-> MII PHY rendezvous
+
+device		etherswitch
+device		arswitch
+
+# read MSDOS formatted disks - USB
+#options 	MSDOSFS
+
+# Enable the uboot environment stuff rather then the
+# redboot stuff.
+options 	AR71XX_ENV_UBOOT
+
+# uzip - to boot natively from flash
+device		geom_uncompress
+options 	GEOM_UNCOMPRESS
+
+# Used for the static uboot partition map
+device          geom_map
+
+# Boot off of the rootfs, as defined in the geom_map setup.
+options 	ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"
diff --git a/sys/mips/conf/AP143.hints b/sys/mips/conf/AP143.hints
new file mode 100644
index 0000000..eb95d00
--- /dev/null
+++ b/sys/mips/conf/AP143.hints
@@ -0,0 +1,105 @@
+#
+# This file adds to the values in QCA953X_BASE.hints.
+#
+# $FreeBSD$
+
+# Embedded Atheros Switch
+hint.arswitch.0.at="mdio1"
+hint.arswitch.0.is_7240=0
+hint.arswitch.0.is_9340=1
+hint.arswitch.0.numphys=4
+hint.arswitch.0.phy4cpu=1	# phy 4 is a "CPU" separate PHY
+hint.arswitch.0.is_rgmii=0
+hint.arswitch.0.is_gmii=1	# arge1 <-> switch PHY is GMII
+
+# arge0 - MII, autoneg, phy(4)
+# MAC for arge0 is the first 6 bytes of the ART
+hint.arge.0.eeprommac=0x1fff0000
+hint.arge.0.phymask=0x10	# PHY4
+hint.arge.0.mdio=mdioproxy2	# .. off of the switch mdiobus
+
+# arge1 - GMII, 1000/full
+hint.arge.1.eeprommac=0x1fff0006
+hint.arge.1.phymask=0x0		# No directly mapped PHYs
+hint.arge.1.media=1000
+hint.arge.1.fduplex=1
+
+# The AP121 4MB flash layout:
+#
+# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
+#    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
+#    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
+#
+# So:
+# 256k: uboot
+# 64: uboot-env
+# 2752k: rootfs
+# 896k: kernel
+# 64k: config
+# 64k: ART
+
+hint.map.0.at="flash/spi0"
+hint.map.0.start=0x00000000
+hint.map.0.end=0x000040000
+hint.map.0.name="uboot"
+hint.map.0.readonly=1
+
+hint.map.1.at="flash/spi0"
+hint.map.1.start=0x00040000
+hint.map.1.end=0x00050000
+hint.map.1.name="uboot-env"
+hint.map.1.readonly=0
+
+hint.map.2.at="flash/spi0"
+hint.map.2.start=0x00050000
+hint.map.2.end=0x00300000
+hint.map.2.name="rootfs"
+hint.map.2.readonly=0
+
+hint.map.3.at="flash/spi0"
+hint.map.3.start=0x00300000
+hint.map.3.end=0x003e0000
+hint.map.3.name="kernel"
+hint.map.3.readonly=0
+
+hint.map.4.at="flash/spi0"
+hint.map.4.start=0x003e0000
+hint.map.4.end=0x003f0000
+hint.map.4.name="cfg"
+hint.map.4.readonly=0
+
+# This is radio calibration section.  It is (or should be!) unique
+# for each board, to take into account thermal and electrical differences
+# as well as the regulatory compliance data.
+#
+hint.map.5.at="flash/spi0"
+hint.map.5.start=0x003f0000
+hint.map.5.end=0x00400000
+hint.map.5.name="art"
+hint.map.5.readonly=1
+
+# GPIO specific configuration block
+
+# Don't flip on anything that isn't already enabled.
+# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
+# not used here.
+hint.gpio.0.function_set=0x00000000
+hint.gpio.0.function_clear=0x00000000
+
+# These are the GPIO LEDs and buttons which can be software controlled.
+#hint.gpio.0.pinmask=0x001c02ae
+# hint.gpio.0.pinmask=0x00001803
+
+# gpio0 - WLAN LED
+# gpio1 - USB LED
+# gpio11 - Jumpstart button
+# gpio12 - Reset button
+
+# LEDs are configured separately and driven by the LED device
+#hint.gpioled.0.at="gpiobus0"
+#hint.gpioled.0.name="wlan"
+#hint.gpioled.0.pins=0x0001
+
+#hint.gpioled.1.at="gpiobus0"
+#hint.gpioled.1.name="usb"
+#hint.gpioled.1.pins=0x0002
diff --git a/sys/mips/conf/QCA953X_BASE b/sys/mips/conf/QCA953X_BASE
new file mode 100644
index 0000000..ec2a464
--- /dev/null
+++ b/sys/mips/conf/QCA953X_BASE
@@ -0,0 +1,138 @@
+#
+# QCA953x -- Kernel configuration base file for the Qualcomm Atheros QCA953x SoC.
+#
+# This file (and the hints file accompanying it) are not designed to be
+# used by themselves. Instead, users of this file should create a kernel
+# config file which includes this file (which gets the basic hints), then
+# override the default options (adding devices as needed) and adding
+# hints as needed (for example, the GPIO and LAN PHY.)
+#
+# $FreeBSD$
+#
+
+machine 	mips mips
+ident		QCA953X_BASE
+cpu		CPU_MIPS4KC
+makeoptions	KERNLOADADDR=0x80050000
+options 	HZ=1000
+
+files		"../atheros/files.ar71xx"
+hints		"QCA953X_BASE.hints"
+
+makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
+makeoptions	MODULES_OVERRIDE="gpio ar71xx if_gif if_vlan if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr hwpmc ipfw"
+
+options 	DDB
+options 	KDB
+options 	ALQ
+options 	BREAK_TO_DEBUGGER
+options 	ALT_BREAK_TO_DEBUGGER
+
+options 	SCHED_4BSD		#4BSD scheduler
+options 	INET			#InterNETworking
+#options 	INET6			#InterNETworking
+#options 	NFSCL			#Network Filesystem Client
+options 	PSEUDOFS		#Pseudo-filesystem framework
+options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
+
+# Don't include the SCSI/CAM strings in the default build
+options 	SCSI_NO_SENSE_STRINGS
+options 	SCSI_NO_OP_STRINGS
+
+# .. And no sysctl strings
+options 	NO_SYSCTL_DESCR
+
+# For small memory footprints
+options		VM_KMEM_SIZE_SCALE=1
+
+# Limit IO size
+options 	NBUF=128
+
+# Limit UMTX hash size
+# options 	UMTX_NUM_CHAINS=64
+
+#options	UMA_DEBUG_ALLOC
+
+# PMC
+options 	HWPMC_HOOKS
+#options 	HWPMC_MIPS_BACKTRACE
+device		hwpmc
+device		hwpmc_mips24k
+
+options		ARGE_DEBUG
+
+# options 	NFS_LEGACYRPC
+# Debugging for use in -current
+options 	INVARIANTS
+options 	INVARIANT_SUPPORT
+options 	WITNESS
+options 	WITNESS_SKIPSPIN
+options 	FFS                     #Berkeley Fast Filesystem
+#options 	SOFTUPDATES             #Enable FFS soft updates support
+#options 	UFS_ACL                 #Support for access control lists
+#options 	UFS_DIRHASH             #Improve performance on big directories
+options 	NO_FFS_SNAPSHOT		# We don't require snapshot support
+
+options		IPFIREWALL_DEFAULT_TO_ACCEPT
+
+# Wireless NIC cards
+options 	IEEE80211_DEBUG
+options 	IEEE80211_SUPPORT_MESH
+options 	IEEE80211_SUPPORT_TDMA
+options 	IEEE80211_SUPPORT_SUPERG
+options 	IEEE80211_ALQ	# 802.11 ALQ logging support
+device		wlan            # 802.11 support
+device		wlan_wep        # 802.11 WEP support
+device		wlan_ccmp       # 802.11 CCMP support
+device		wlan_tkip       # 802.11 TKIP support
+device		wlan_xauth	# 802.11 hostap support
+
+# ath(4)
+device		ath             # Atheros network device
+device		ath_rate_sample
+device		ath_ahb		# Atheros host bus glue
+options 	ATH_DEBUG
+options 	ATH_DIAGAPI
+option		ATH_ENABLE_11N
+option 		AH_DEBUG_ALQ
+
+#device		ath_hal
+device		ath_ar9300		# AR9330 HAL; no need for the others
+option		AH_DEBUG
+option		AH_SUPPORT_AR5416	# 11n HAL support
+option		AH_SUPPORT_AR9330	# Chipset support
+option		AH_AR5416_INTERRUPT_MITIGATION
+
+device		mii
+device		arge
+
+device		usb
+options 	USB_EHCI_BIG_ENDIAN_DESC        # handle big-endian byte order
+options 	USB_DEBUG
+options 	USB_HOST_ALIGN=32		# AR71XX (MIPS in general?) requires this
+device		ehci
+
+device		scbus
+device		umass
+device		da
+
+device		spibus
+device		ar71xx_spi
+device		mx25l
+device		ar71xx_wdog
+
+# Handle 25MHz refclock by allowing a higher baudrate error tolerance.
+device		uart
+device		uart_ar71xx
+options		UART_DEV_TOLERANCE_PCT=50
+
+device		ar71xx_apb
+
+device		loop
+device		ether
+device		md
+device		bpf
+device		random
+device		if_bridge
+device		gpio
+device		gpioled
diff --git a/sys/mips/conf/QCA953X_BASE.hints b/sys/mips/conf/QCA953X_BASE.hints
new file mode 100644
index 0000000..4bbb083
--- /dev/null
+++ b/sys/mips/conf/QCA953X_BASE.hints
@@ -0,0 +1,75 @@
+# This file (and the kernel config file accompanying it) are not designed 
+# to be used by themselves. Instead, users of this file should create a
+# kernel # config file which includes this file (which gets the basic hints),
+# then override the default options (adding devices as needed) and adding
+# hints as needed (for example, the GPIO and LAN PHY.)
+
+# $FreeBSD$
+
+hint.apb.0.at="nexus0"
+hint.apb.0.irq=4
+
+# mdiobus on arge0 - required to bring up arge0
+hint.argemdio.0.at="nexus0"
+hint.argemdio.0.maddr=0x19000000
+hint.argemdio.0.msize=0x1000
+hint.argemdio.0.order=0
+
+# mdiobus on arge1 - this is what the internal switch is hooked into.
+hint.argemdio.1.at="nexus0"
+hint.argemdio.1.maddr=0x1a000000
+hint.argemdio.1.msize=0x1000
+hint.argemdio.1.order=0
+
+# uart0
+hint.uart.0.at="apb0"
+# see atheros/uart_cpu_ar71xx.c why +3
+hint.uart.0.maddr=0x18020003
+hint.uart.0.msize=0x18
+hint.uart.0.irq=3
+
+# ehci - on IP3
+hint.ehci.0.at="nexus0"
+hint.ehci.0.maddr=0x1b000100
+hint.ehci.0.msize=0x00ffff00
+hint.ehci.0.irq=1
+
+hint.arge.0.at="nexus0"
+hint.arge.0.maddr=0x19000000
+hint.arge.0.msize=0x1000
+hint.arge.0.irq=2
+
+hint.arge.1.at="nexus0"
+hint.arge.1.maddr=0x1a000000
+hint.arge.1.msize=0x1000
+hint.arge.1.irq=3
+
+# XXX The ath device hangs off of the AHB, rather than the Nexus.
+hint.ath.0.at="nexus0"
+hint.ath.0.maddr=0x18100000
+hint.ath.0.msize=0x20000
+hint.ath.0.irq=0
+hint.ath.0.vendor_id=0x168c
+# XXX for now this is 0x00ff because there's no HAL support
+# yet for honeybee.
+hint.ath.0.device_id=0x00ff
+# Set this to define where the ath calibration data
+# should be fetched from in physical memory.
+# hint.ath.0.eepromaddr=0x1fff1000
+
+# SPI flash
+hint.spi.0.at="nexus0"
+hint.spi.0.maddr=0x1f000000
+hint.spi.0.msize=0x10
+
+hint.mx25l.0.at="spibus0"
+hint.mx25l.0.cs=0
+
+# Watchdog
+hint.ar71xx_wdog.0.at="nexus0"
+
+# The GPIO function and pin mask is configured per-board
+hint.gpio.0.at="apb0"
+hint.gpio.0.maddr=0x18040000
+hint.gpio.0.msize=0x1000
+hint.gpio.0.irq=2