Merge the Cavium Octeon SDK 2.3.0 Simple Executive code and update FreeBSD to

make use of it where possible.

This primarily brings in support for newer hardware, and FreeBSD is not yet
able to support the abundance of IRQs on new hardware and many features in the
Ethernet driver.

Because of the changes to IRQs in the Simple Executive, we have to maintain our
own list of Octeon IRQs now, which probably can be pared-down and be specific
to the CIU interrupt unit soon, and when other interrupt mechanisms are added
they can maintain their own definitions.

Remove unmasking of interrupts from within the UART device now that the
function used is no longer present in the Simple Executive.  The unmasking
seems to have been gratuitous as this is more properly handled by the buses
above the UART device, and seems to work on that basis.

17 files changed, 255 insertions, 67 deletions

diff --git a/sys/mips/cavium/ciu.c b/sys/mips/cavium/ciu.c
index 3767ec3..dab1621 100644
--- a/sys/mips/cavium/ciu.c
+++ b/sys/mips/cavium/ciu.c
@@ -43,7 +43,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/intr_machdep.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 
 /*
  * This bus sits between devices/buses and nexus and handles CIU interrupts
@@ -53,12 +53,12 @@ __FBSDID("$FreeBSD$");
 
 #define	CIU_IRQ_HARD		(0)
 
-#define	CIU_IRQ_EN0_BEGIN	CVMX_IRQ_WORKQ0
-#define	CIU_IRQ_EN0_END		CVMX_IRQ_BOOTDMA
+#define	CIU_IRQ_EN0_BEGIN	OCTEON_IRQ_WORKQ0
+#define	CIU_IRQ_EN0_END		OCTEON_IRQ_BOOTDMA
 #define	CIU_IRQ_EN0_COUNT	((CIU_IRQ_EN0_END - CIU_IRQ_EN0_BEGIN) + 1)
 
-#define	CIU_IRQ_EN1_BEGIN	CVMX_IRQ_WDOG0
-#define	CIU_IRQ_EN1_END		CVMX_IRQ_DFM
+#define	CIU_IRQ_EN1_BEGIN	OCTEON_IRQ_WDOG0
+#define	CIU_IRQ_EN1_END		OCTEON_IRQ_DFM
 #define	CIU_IRQ_EN1_COUNT	((CIU_IRQ_EN1_END - CIU_IRQ_EN1_BEGIN) + 1)
 
 struct ciu_softc {
diff --git a/sys/mips/cavium/files.octeon1 b/sys/mips/cavium/files.octeon1
index a1400b7..6222a264 100644
--- a/sys/mips/cavium/files.octeon1
+++ b/sys/mips/cavium/files.octeon1
@@ -70,13 +70,20 @@ contrib/octeon-sdk/cvmx-error-init-cn56xx.c	standard
 contrib/octeon-sdk/cvmx-error-init-cn56xxp1.c	standard
 contrib/octeon-sdk/cvmx-error-init-cn58xx.c	standard
 contrib/octeon-sdk/cvmx-error-init-cn58xxp1.c	standard
+contrib/octeon-sdk/cvmx-error-init-cn61xx.c	standard
 contrib/octeon-sdk/cvmx-error-init-cn63xx.c	standard
 contrib/octeon-sdk/cvmx-error-init-cn63xxp1.c	standard
+contrib/octeon-sdk/cvmx-error-init-cn66xx.c	standard
+contrib/octeon-sdk/cvmx-error-init-cn68xx.c	standard
+contrib/octeon-sdk/cvmx-error-init-cn68xxp1.c	standard
+contrib/octeon-sdk/cvmx-error-init-cnf71xx.c	standard
 contrib/octeon-sdk/cvmx-fpa.c			standard
 contrib/octeon-sdk/cvmx-helper.c		standard
 contrib/octeon-sdk/cvmx-helper-board.c		standard
+contrib/octeon-sdk/cvmx-helper-cfg.c		standard
 contrib/octeon-sdk/cvmx-helper-errata.c		standard
 contrib/octeon-sdk/cvmx-helper-fpa.c		standard
+contrib/octeon-sdk/cvmx-helper-ilk.c		standard
 contrib/octeon-sdk/cvmx-helper-jtag.c		standard
 contrib/octeon-sdk/cvmx-helper-loop.c		standard
 contrib/octeon-sdk/cvmx-helper-npi.c		standard
@@ -86,9 +93,13 @@ contrib/octeon-sdk/cvmx-helper-spi.c		standard
 contrib/octeon-sdk/cvmx-helper-srio.c		standard
 contrib/octeon-sdk/cvmx-helper-util.c		standard
 contrib/octeon-sdk/cvmx-helper-xaui.c		standard
+contrib/octeon-sdk/cvmx-ilk.c			standard
+contrib/octeon-sdk/cvmx-ipd.c			standard
 contrib/octeon-sdk/cvmx-l2c.c			standard
 contrib/octeon-sdk/cvmx-pcie.c			standard
 contrib/octeon-sdk/cvmx-pko.c			standard
+contrib/octeon-sdk/cvmx-qlm.c			standard
+contrib/octeon-sdk/cvmx-qlm-tables.c		standard
 contrib/octeon-sdk/cvmx-spi.c			standard
 contrib/octeon-sdk/cvmx-spi4000.c		standard
 contrib/octeon-sdk/cvmx-srio.c			standard
diff --git a/sys/mips/cavium/if_octm.c b/sys/mips/cavium/if_octm.c
index 1b3c68f..c6778ff 100644
--- a/sys/mips/cavium/if_octm.c
+++ b/sys/mips/cavium/if_octm.c
@@ -61,7 +61,7 @@
 #endif
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 #include <contrib/octeon-sdk/cvmx-mgmt-port.h>
 
 struct octm_softc {
@@ -163,10 +163,10 @@ octm_attach(device_t dev)
 
 	switch (sc->sc_port) {
 	case 0:
-		irq = CVMX_IRQ_MII;
+		irq = OCTEON_IRQ_MII;
 		break;
 	case 1:
-		irq = CVMX_IRQ_MII1;
+		irq = OCTEON_IRQ_MII1;
 		break;
 	default:
 		device_printf(dev, "unsupported management port %u.\n", sc->sc_port);
diff --git a/sys/mips/cavium/obio.c b/sys/mips/cavium/obio.c
index 4705730..f3b3bbb 100644
--- a/sys/mips/cavium/obio.c
+++ b/sys/mips/cavium/obio.c
@@ -57,7 +57,7 @@ __FBSDID("$FreeBSD$");
 #include <mips/cavium/obiovar.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 
 extern struct bus_space octeon_uart_tag;
 
@@ -107,7 +107,7 @@ obio_attach(device_t dev)
 	 * manages IRQs for UART0 and UART1.
 	 */
 	if (rman_init(&sc->oba_irq_rman) != 0 ||
-	    rman_manage_region(&sc->oba_irq_rman, CVMX_IRQ_UART0, CVMX_IRQ_UART1) != 0)
+	    rman_manage_region(&sc->oba_irq_rman, OCTEON_IRQ_UART0, OCTEON_IRQ_UART1) != 0)
 		panic("obio_attach: failed to set up IRQ rman");
 
 	device_add_child(dev, "uart", 1);  /* Setup Uart-1 first. */
@@ -131,10 +131,10 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
 	case SYS_RES_IRQ:
 		switch (device_get_unit(child)) {
 		case 0:
-			start = end = CVMX_IRQ_UART0;
+			start = end = OCTEON_IRQ_UART0;
 			break;
 		case 1:
-			start = end = CVMX_IRQ_UART1;
+			start = end = OCTEON_IRQ_UART1;
 			break;
 		default:
 			return (NULL);
diff --git a/sys/mips/cavium/octe/ethernet-rgmii.c b/sys/mips/cavium/octe/ethernet-rgmii.c
index e9921cd..47fe7d4 100644
--- a/sys/mips/cavium/octe/ethernet-rgmii.c
+++ b/sys/mips/cavium/octe/ethernet-rgmii.c
@@ -232,8 +232,8 @@ int cvm_oct_rgmii_init(struct ifnet *ifp)
 
 		rid = 0;
 		sc->sc_rgmii_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ,
-						      &rid, CVMX_IRQ_RML,
-						      CVMX_IRQ_RML, 1,
+						      &rid, OCTEON_IRQ_RML,
+						      OCTEON_IRQ_RML, 1,
 						      RF_ACTIVE);
 		if (sc->sc_rgmii_irq == NULL) {
 			device_printf(sc->sc_dev, "could not allocate RGMII irq");
diff --git a/sys/mips/cavium/octe/ethernet-rx.c b/sys/mips/cavium/octe/ethernet-rx.c
index 5e01272..4c7f487 100644
--- a/sys/mips/cavium/octe/ethernet-rx.c
+++ b/sys/mips/cavium/octe/ethernet-rx.c
@@ -92,7 +92,7 @@ int cvm_oct_do_interrupt(void *dev_id)
  */
 static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
 {
-	if ((work->word2.snoip.err_code == 10) && (work->len <= 64)) {
+	if ((work->word2.snoip.err_code == 10) && (work->word1.s.len <= 64)) {
 		/* Ignore length errors on min size packets. Some equipment
 		   incorrectly pads packets to 64+4FCS instead of 60+4FCS.
 		   Note these packets still get counted as frame errors. */
@@ -104,8 +104,8 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
 		   10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK} off. If this is the
 		   case we need to parse the packet to determine if we can
 		   remove a non spec preamble and generate a correct packet */
-		int interface = cvmx_helper_get_interface_num(work->ipprt);
-		int index = cvmx_helper_get_interface_index_num(work->ipprt);
+		int interface = cvmx_helper_get_interface_num(work->word1.cn38xx.ipprt);
+		int index = cvmx_helper_get_interface_index_num(work->word1.cn38xx.ipprt);
 		cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl;
 		gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
 		if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
@@ -113,7 +113,7 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
 			uint8_t *ptr = cvmx_phys_to_ptr(work->packet_ptr.s.addr);
 			int i = 0;
 
-			while (i < work->len-1) {
+			while (i < work->word1.s.len-1) {
 				if (*ptr != 0x55)
 					break;
 				ptr++;
@@ -122,23 +122,23 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
 
 			if (*ptr == 0xd5) {
 				/*
-				DEBUGPRINT("Port %d received 0xd5 preamble\n", work->ipprt);
+				DEBUGPRINT("Port %d received 0xd5 preamble\n", work->word1.cn38xx.ipprt);
 				*/
 				work->packet_ptr.s.addr += i+1;
-				work->len -= i+5;
+				work->word1.s.len -= i+5;
 			} else
 			if ((*ptr & 0xf) == 0xd) {
 				/*
-				DEBUGPRINT("Port %d received 0x?d preamble\n", work->ipprt);
+				DEBUGPRINT("Port %d received 0x?d preamble\n", work->word1.cn38xx.ipprt);
 				*/
 				work->packet_ptr.s.addr += i;
-				work->len -= i+4;
-				for (i = 0; i < work->len; i++) {
+				work->word1.s.len -= i+4;
+				for (i = 0; i < work->word1.s.len; i++) {
 					*ptr = ((*ptr&0xf0)>>4) | ((*(ptr+1)&0xf)<<4);
 					ptr++;
 				}
 			} else {
-				DEBUGPRINT("Port %d unknown preamble, packet dropped\n", work->ipprt);
+				DEBUGPRINT("Port %d unknown preamble, packet dropped\n", work->word1.cn38xx.ipprt);
 				/*
 				cvmx_helper_dump_packet(work);
 				*/
@@ -147,7 +147,7 @@ static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
 			}
 		}
 	} else {
-		DEBUGPRINT("Port %d receive error code %d, packet dropped\n", work->ipprt, work->word2.snoip.err_code);
+		DEBUGPRINT("Port %d receive error code %d, packet dropped\n", work->word1.cn38xx.ipprt, work->word2.snoip.err_code);
 		cvm_oct_free_work(work);
 		return 1;
 	}
@@ -199,7 +199,7 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 			CVMX_PREFETCH(m, offsetof(struct mbuf, m_data));
 			CVMX_PREFETCH(m, offsetof(struct mbuf, m_pkthdr));
 		}
-		CVMX_PREFETCH(cvm_oct_device[work->ipprt], 0);
+		CVMX_PREFETCH(cvm_oct_device[work->word1.cn38xx.ipprt], 0);
 		//CVMX_PREFETCH(m, 0);
 
 
@@ -215,7 +215,7 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 		if ((mbuf_in_hw)) {
 			CVMX_PREFETCH(m->m_data, 0);
 
-			m->m_pkthdr.len = m->m_len = work->len;
+			m->m_pkthdr.len = m->m_len = work->word1.s.len;
 
 			packet_not_copied = 1;
 
@@ -230,7 +230,7 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 			   mbuf for it */
 			MGETHDR(m, M_DONTWAIT, MT_DATA);
 			if (m == NULL) {
-				DEBUGPRINT("Port %d failed to allocate mbuf, packet dropped\n", work->ipprt);
+				DEBUGPRINT("Port %d failed to allocate mbuf, packet dropped\n", work->word1.cn38xx.ipprt);
 				cvm_oct_free_work(work);
 				continue;
 			}
@@ -253,7 +253,7 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 			} else {
 				int segments = work->word2.s.bufs;
 				cvmx_buf_ptr_t segment_ptr = work->packet_ptr;
-				int len = work->len;
+				int len = work->word1.s.len;
 
 				while (segments--) {
 					cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8);
@@ -283,9 +283,9 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 			packet_not_copied = 0;
 		}
 
-		if (((work->ipprt < TOTAL_NUMBER_OF_PORTS) &&
-		    cvm_oct_device[work->ipprt])) {
-			struct ifnet *ifp = cvm_oct_device[work->ipprt];
+		if (((work->word1.cn38xx.ipprt < TOTAL_NUMBER_OF_PORTS) &&
+		    cvm_oct_device[work->word1.cn38xx.ipprt])) {
+			struct ifnet *ifp = cvm_oct_device[work->word1.cn38xx.ipprt];
 
 			/* Only accept packets for devices
 			   that are currently up */
@@ -317,7 +317,7 @@ void cvm_oct_tasklet_rx(void *context, int pending)
 		} else {
 			/* Drop any packet received for a device that
 			   doesn't exist */
-			DEBUGPRINT("Port %d not controlled by Linux, packet dropped\n", work->ipprt);
+			DEBUGPRINT("Port %d not controlled by Linux, packet dropped\n", work->word1.cn38xx.ipprt);
 			m_freem(m);
 		}
 
diff --git a/sys/mips/cavium/octe/ethernet-spi.c b/sys/mips/cavium/octe/ethernet-spi.c
index b88afd9..b378117 100644
--- a/sys/mips/cavium/octe/ethernet-spi.c
+++ b/sys/mips/cavium/octe/ethernet-spi.c
@@ -266,8 +266,8 @@ int cvm_oct_spi_init(struct ifnet *ifp)
 
 		rid = 0;
 		sc->sc_spi_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ,
-						    &rid, CVMX_IRQ_RML,
-						    CVMX_IRQ_RML, 1,
+						    &rid, OCTEON_IRQ_RML,
+						    OCTEON_IRQ_RML, 1,
 						    RF_ACTIVE);
 		if (sc->sc_spi_irq == NULL) {
 			device_printf(sc->sc_dev, "could not allocate SPI irq");
diff --git a/sys/mips/cavium/octe/ethernet.c b/sys/mips/cavium/octe/ethernet.c
index 65bff67..290cc9f 100644
--- a/sys/mips/cavium/octe/ethernet.c
+++ b/sys/mips/cavium/octe/ethernet.c
@@ -234,8 +234,8 @@ static void cvm_oct_configure_common_hw(device_t bus)
 	/* Register an IRQ hander for to receive POW interrupts */
         rid = 0;
         sc->sc_rx_irq = bus_alloc_resource(bus, SYS_RES_IRQ, &rid,
-					   CVMX_IRQ_WORKQ0 + pow_receive_group,
-					   CVMX_IRQ_WORKQ0 + pow_receive_group,
+					   OCTEON_IRQ_WORKQ0 + pow_receive_group,
+					   OCTEON_IRQ_WORKQ0 + pow_receive_group,
 					   1, RF_ACTIVE);
         if (sc->sc_rx_irq == NULL) {
                 device_printf(bus, "could not allocate workq irq");
diff --git a/sys/mips/cavium/octe/wrapper-cvmx-includes.h b/sys/mips/cavium/octe/wrapper-cvmx-includes.h
index a3bb651..414faba 100644
--- a/sys/mips/cavium/octe/wrapper-cvmx-includes.h
+++ b/sys/mips/cavium/octe/wrapper-cvmx-includes.h
@@ -44,7 +44,7 @@ AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR W
 #include <contrib/octeon-sdk/cvmx-app-init.h>
 #include <contrib/octeon-sdk/cvmx-helper.h>
 #include <contrib/octeon-sdk/cvmx-helper-board.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 #include <contrib/octeon-sdk/octeon-model.h>
 
 #endif
diff --git a/sys/mips/cavium/octeon_gpio.c b/sys/mips/cavium/octeon_gpio.c
index a1253bb..9ef09f0 100644
--- a/sys/mips/cavium/octeon_gpio.c
+++ b/sys/mips/cavium/octeon_gpio.c
@@ -48,7 +48,7 @@ __FBSDID("$FreeBSD$");
 
 #include <contrib/octeon-sdk/cvmx.h>
 #include <contrib/octeon-sdk/cvmx-gpio.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 
 #include <mips/cavium/octeon_gpiovar.h>
 
@@ -389,7 +389,7 @@ octeon_gpio_attach(device_t dev)
 	for ( i = 0; i < OCTEON_GPIO_IRQS; i++) {
 		if ((sc->gpio_irq_res[i] = bus_alloc_resource(dev, 
 		    SYS_RES_IRQ, &sc->gpio_irq_rid[i], 
-		    CVMX_IRQ_GPIO0 + i, CVMX_IRQ_GPIO0 + i, 1, 
+		    OCTEON_IRQ_GPIO0 + i, OCTEON_IRQ_GPIO0 + i, 1, 
 		    RF_SHAREABLE | RF_ACTIVE)) == NULL) {
 			device_printf(dev, "unable to allocate IRQ resource\n");
 			return (ENXIO);
diff --git a/sys/mips/cavium/octeon_irq.h b/sys/mips/cavium/octeon_irq.h
new file mode 100644
index 0000000..b755990
--- /dev/null
+++ b/sys/mips/cavium/octeon_irq.h
@@ -0,0 +1,179 @@
+/***********************license start***************
+ * Copyright (c) 2003-2010  Cavium Networks (support@cavium.com). All rights
+ * reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *
+ *   * Redistributions in binary form must reproduce the above
+ *     copyright notice, this list of conditions and the following
+ *     disclaimer in the documentation and/or other materials provided
+ *     with the distribution.
+
+ *   * Neither the name of Cavium Networks nor the names of
+ *     its contributors may be used to endorse or promote products
+ *     derived from this software without specific prior written
+ *     permission.
+
+ * This Software, including technical data, may be subject to U.S. export  control
+ * laws, including the U.S. Export Administration Act and its  associated
+ * regulations, and may be subject to export or import  regulations in other
+ * countries.
+
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
+ * AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
+ * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
+ * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
+ ***********************license end**************************************/
+
+#ifndef __OCTEON_IRQ_H__
+#define __OCTEON_IRQ_H__
+
+/*
+ * $FreeBSD$
+ */
+
+/**
+ * Enumeration of Interrupt numbers
+ */
+typedef enum
+{
+    /* 0 - 7 represent the 8 MIPS standard interrupt sources */
+    OCTEON_IRQ_SW0        = 0,
+    OCTEON_IRQ_SW1        = 1,
+    OCTEON_IRQ_CIU0       = 2,
+    OCTEON_IRQ_CIU1       = 3,
+    OCTEON_IRQ_4          = 4,
+    OCTEON_IRQ_5          = 5,
+    OCTEON_IRQ_6          = 6,
+    OCTEON_IRQ_7          = 7,
+
+    /* 8 - 71 represent the sources in CIU_INTX_EN0 */
+    OCTEON_IRQ_WORKQ0     = 8,
+    OCTEON_IRQ_WORKQ1     = 9,
+    OCTEON_IRQ_WORKQ2     = 10,
+    OCTEON_IRQ_WORKQ3     = 11,
+    OCTEON_IRQ_WORKQ4     = 12,
+    OCTEON_IRQ_WORKQ5     = 13,
+    OCTEON_IRQ_WORKQ6     = 14,
+    OCTEON_IRQ_WORKQ7     = 15,
+    OCTEON_IRQ_WORKQ8     = 16,
+    OCTEON_IRQ_WORKQ9     = 17,
+    OCTEON_IRQ_WORKQ10    = 18,
+    OCTEON_IRQ_WORKQ11    = 19,
+    OCTEON_IRQ_WORKQ12    = 20,
+    OCTEON_IRQ_WORKQ13    = 21,
+    OCTEON_IRQ_WORKQ14    = 22,
+    OCTEON_IRQ_WORKQ15    = 23,
+    OCTEON_IRQ_GPIO0      = 24,
+    OCTEON_IRQ_GPIO1      = 25,
+    OCTEON_IRQ_GPIO2      = 26,
+    OCTEON_IRQ_GPIO3      = 27,
+    OCTEON_IRQ_GPIO4      = 28,
+    OCTEON_IRQ_GPIO5      = 29,
+    OCTEON_IRQ_GPIO6      = 30,
+    OCTEON_IRQ_GPIO7      = 31,
+    OCTEON_IRQ_GPIO8      = 32,
+    OCTEON_IRQ_GPIO9      = 33,
+    OCTEON_IRQ_GPIO10     = 34,
+    OCTEON_IRQ_GPIO11     = 35,
+    OCTEON_IRQ_GPIO12     = 36,
+    OCTEON_IRQ_GPIO13     = 37,
+    OCTEON_IRQ_GPIO14     = 38,
+    OCTEON_IRQ_GPIO15     = 39,
+    OCTEON_IRQ_MBOX0      = 40,
+    OCTEON_IRQ_MBOX1      = 41,
+    OCTEON_IRQ_UART0      = 42,
+    OCTEON_IRQ_UART1      = 43,
+    OCTEON_IRQ_PCI_INT0   = 44,
+    OCTEON_IRQ_PCI_INT1   = 45,
+    OCTEON_IRQ_PCI_INT2   = 46,
+    OCTEON_IRQ_PCI_INT3   = 47,
+    OCTEON_IRQ_PCI_MSI0   = 48,
+    OCTEON_IRQ_PCI_MSI1   = 49,
+    OCTEON_IRQ_PCI_MSI2   = 50,
+    OCTEON_IRQ_PCI_MSI3   = 51,
+    OCTEON_IRQ_RESERVED44 = 52,
+    OCTEON_IRQ_TWSI       = 53,
+    OCTEON_IRQ_RML        = 54,
+    OCTEON_IRQ_TRACE      = 55,
+    OCTEON_IRQ_GMX_DRP0   = 56,
+    OCTEON_IRQ_GMX_DRP1   = 57,   /* Doesn't apply on CN52XX or CN63XX */
+    OCTEON_IRQ_IPD_DRP    = 58,
+    OCTEON_IRQ_KEY_ZERO   = 59,   /* Doesn't apply on CN52XX or CN63XX */
+    OCTEON_IRQ_TIMER0     = 60,
+    OCTEON_IRQ_TIMER1     = 61,
+    OCTEON_IRQ_TIMER2     = 62,
+    OCTEON_IRQ_TIMER3     = 63,
+    OCTEON_IRQ_USB0       = 64,   /* Doesn't apply on CN38XX or CN58XX */
+    OCTEON_IRQ_PCM        = 65,   /* Doesn't apply on CN52XX or CN63XX */
+    OCTEON_IRQ_MPI        = 66,   /* Doesn't apply on CN52XX or CN63XX */
+    OCTEON_IRQ_TWSI2      = 67,   /* Added in CN56XX */
+    OCTEON_IRQ_POWIQ      = 68,   /* Added in CN56XX */
+    OCTEON_IRQ_IPDPPTHR   = 69,   /* Added in CN56XX */
+    OCTEON_IRQ_MII        = 70,   /* Added in CN56XX */
+    OCTEON_IRQ_BOOTDMA    = 71,   /* Added in CN56XX */
+
+    /* 72 - 135 represent the sources in CIU_INTX_EN1 */
+    OCTEON_IRQ_WDOG0 = 72,
+    OCTEON_IRQ_WDOG1 = 73,
+    OCTEON_IRQ_WDOG2 = 74,
+    OCTEON_IRQ_WDOG3 = 75,
+    OCTEON_IRQ_WDOG4 = 76,
+    OCTEON_IRQ_WDOG5 = 77,
+    OCTEON_IRQ_WDOG6 = 78,
+    OCTEON_IRQ_WDOG7 = 79,
+    OCTEON_IRQ_WDOG8 = 80,
+    OCTEON_IRQ_WDOG9 = 81,
+    OCTEON_IRQ_WDOG10= 82,
+    OCTEON_IRQ_WDOG11= 83,
+    OCTEON_IRQ_WDOG12= 84,
+    OCTEON_IRQ_WDOG13= 85,
+    OCTEON_IRQ_WDOG14= 86,
+    OCTEON_IRQ_WDOG15= 87,
+    OCTEON_IRQ_UART2 = 88,           /* Added in CN52XX */
+    OCTEON_IRQ_USB1  = 89,           /* Added in CN52XX */
+    OCTEON_IRQ_MII1  = 90,           /* Added in CN52XX */
+    OCTEON_IRQ_NAND  = 91,           /* Added in CN52XX */
+    OCTEON_IRQ_MIO   = 92,           /* Added in CN63XX */
+    OCTEON_IRQ_IOB   = 93,           /* Added in CN63XX */
+    OCTEON_IRQ_FPA   = 94,           /* Added in CN63XX */
+    OCTEON_IRQ_POW   = 95,           /* Added in CN63XX */
+    OCTEON_IRQ_L2C   = 96,           /* Added in CN63XX */
+    OCTEON_IRQ_IPD   = 97,           /* Added in CN63XX */
+    OCTEON_IRQ_PIP   = 98,           /* Added in CN63XX */
+    OCTEON_IRQ_PKO   = 99,           /* Added in CN63XX */
+    OCTEON_IRQ_ZIP   = 100,          /* Added in CN63XX */
+    OCTEON_IRQ_TIM   = 101,          /* Added in CN63XX */
+    OCTEON_IRQ_RAD   = 102,          /* Added in CN63XX */
+    OCTEON_IRQ_KEY   = 103,          /* Added in CN63XX */
+    OCTEON_IRQ_DFA   = 104,          /* Added in CN63XX */
+    OCTEON_IRQ_USB   = 105,          /* Added in CN63XX */
+    OCTEON_IRQ_SLI   = 106,          /* Added in CN63XX */
+    OCTEON_IRQ_DPI   = 107,          /* Added in CN63XX */
+    OCTEON_IRQ_AGX0  = 108,          /* Added in CN63XX */
+    /* 109 - 117 are reserved */
+    OCTEON_IRQ_AGL   = 118,          /* Added in CN63XX */
+    OCTEON_IRQ_PTP   = 119,          /* Added in CN63XX */
+    OCTEON_IRQ_PEM0  = 120,          /* Added in CN63XX */
+    OCTEON_IRQ_PEM1  = 121,          /* Added in CN63XX */
+    OCTEON_IRQ_SRIO0 = 122,          /* Added in CN63XX */
+    OCTEON_IRQ_SRIO1 = 123,          /* Added in CN63XX */
+    OCTEON_IRQ_LMC0  = 124,          /* Added in CN63XX */
+    /* Interrupts 125 - 127 are reserved */
+    OCTEON_IRQ_DFM   = 128,          /* Added in CN63XX */
+    /* Interrupts 129 - 135 are reserved */
+} octeon_irq_t;
+
+#endif
diff --git a/sys/mips/cavium/octeon_machdep.c b/sys/mips/cavium/octeon_machdep.c
index df865b8..13e051e 100644
--- a/sys/mips/cavium/octeon_machdep.c
+++ b/sys/mips/cavium/octeon_machdep.c
@@ -77,6 +77,8 @@ __FBSDID("$FreeBSD$");
 #include <contrib/octeon-sdk/cvmx-interrupt.h>
 #include <contrib/octeon-sdk/cvmx-version.h>
 
+#include <mips/cavium/octeon_irq.h>
+
 #if defined(__mips_n64) 
 #define MAX_APP_DESC_ADDR     0xffffffffafffffff
 #else
@@ -112,6 +114,16 @@ static const struct octeon_feature_description octeon_feature_descriptions[] = {
 	{ OCTEON_FEATURE_DFA,			"DFA" },
 	{ OCTEON_FEATURE_MDIO_CLAUSE_45,	"MDIO_CLAUSE_45" },
 	{ OCTEON_FEATURE_NPEI,			"NPEI" },
+	{ OCTEON_FEATURE_ILK,			"ILK" },
+	{ OCTEON_FEATURE_HFA,			"HFA" },
+	{ OCTEON_FEATURE_DFM,			"DFM" },
+	{ OCTEON_FEATURE_CIU2,			"CIU2" },
+	{ OCTEON_FEATURE_DICI_MODE,		"DICI_MODE" },
+	{ OCTEON_FEATURE_BIT_EXTRACTOR,		"BIT_EXTRACTOR" },
+	{ OCTEON_FEATURE_NAND,			"NAND" },
+	{ OCTEON_FEATURE_MMC,			"MMC" },
+	{ OCTEON_FEATURE_PKND,			"PKND" },
+	{ OCTEON_FEATURE_CN68XX_WQE,		"CN68XX_WQE" },
 	{ 0,					NULL }
 };
 
@@ -257,8 +269,8 @@ octeon_ciu_reset(void)
 #ifdef SMP
 	/* Enable the MBOX interrupts.  */
 	cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
-		       (1ull << (CVMX_IRQ_MBOX0 - 8)) |
-		       (1ull << (CVMX_IRQ_MBOX1 - 8)));
+		       (1ull << (OCTEON_IRQ_MBOX0 - 8)) |
+		       (1ull << (OCTEON_IRQ_MBOX1 - 8)));
 #endif
 }
 
diff --git a/sys/mips/cavium/octeon_mp.c b/sys/mips/cavium/octeon_mp.c
index 9583977..783a45f 100644
--- a/sys/mips/cavium/octeon_mp.c
+++ b/sys/mips/cavium/octeon_mp.c
@@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$");
 #include <mips/cavium/octeon_pcmap_regs.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 
 unsigned octeon_ap_boot = ~0;
 
diff --git a/sys/mips/cavium/octeon_wdog.c b/sys/mips/cavium/octeon_wdog.c
index 9b18474..d01cd90 100644
--- a/sys/mips/cavium/octeon_wdog.c
+++ b/sys/mips/cavium/octeon_wdog.c
@@ -44,7 +44,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/smp.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 
 #define	DEFAULT_TIMER_VAL	65535
 
@@ -174,7 +174,7 @@ octeon_wdog_setup(struct octeon_wdog_softc *sc, int core)
 	/* Interrupt part */
 	rid = 0;
 	csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid,
-	    CVMX_IRQ_WDOG0 + core, CVMX_IRQ_WDOG0 + core, 1, RF_ACTIVE);
+	    OCTEON_IRQ_WDOG0 + core, OCTEON_IRQ_WDOG0 + core, 1, RF_ACTIVE);
 	if (csc->csc_intr == NULL)
 		panic("%s: bus_alloc_resource for core %u failed",
 		    __func__, core);
diff --git a/sys/mips/cavium/octopci.c b/sys/mips/cavium/octopci.c
index 392aed8..e9d5b6f 100644
--- a/sys/mips/cavium/octopci.c
+++ b/sys/mips/cavium/octopci.c
@@ -49,7 +49,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/pmap.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 #include <contrib/octeon-sdk/cvmx-pcie.h>
 
 #include <dev/pci/pcireg.h>
@@ -424,7 +424,7 @@ octopci_route_interrupt(device_t dev, device_t child, int pin)
 	sc = device_get_softc(dev);
 
 	if (octeon_has_feature(OCTEON_FEATURE_PCIE))
-		return (CVMX_IRQ_PCI_INT0 + pin - 1);
+		return (OCTEON_IRQ_PCI_INT0 + pin - 1);
 
         bus = pci_get_bus(child);
         slot = pci_get_slot(child);
@@ -435,7 +435,7 @@ octopci_route_interrupt(device_t dev, device_t child, int pin)
 	 */
 #if defined(OCTEON_BOARD_CAPK_0100ND)
 	if (bus == 0 && slot == 12 && func == 0)
-		return (CVMX_IRQ_PCI_INT2);
+		return (OCTEON_IRQ_PCI_INT2);
 #endif
 
 	/*
@@ -444,14 +444,14 @@ octopci_route_interrupt(device_t dev, device_t child, int pin)
 	switch (cvmx_sysinfo_get()->board_type) {
 #if defined(OCTEON_VENDOR_LANNER)
 	case CVMX_BOARD_TYPE_CUST_LANNER_MR955:
-		return (CVMX_IRQ_PCI_INT0 + pin - 1);
+		return (OCTEON_IRQ_PCI_INT0 + pin - 1);
 	case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
 		if (slot < 32) {
 			if (slot == 3 || slot == 9)
 				irq = pin;
 			else
 				irq = pin - 1;
-			return (CVMX_IRQ_PCI_INT0 + (irq & 3));
+			return (OCTEON_IRQ_PCI_INT0 + (irq & 3));
 		}
 		break;
 #endif
@@ -461,7 +461,7 @@ octopci_route_interrupt(device_t dev, device_t child, int pin)
 
 	irq = slot + pin - 3;
 
-	return (CVMX_IRQ_PCI_INT0 + (irq & 3));
+	return (OCTEON_IRQ_PCI_INT0 + (irq & 3));
 }
 
 static unsigned
diff --git a/sys/mips/cavium/uart_dev_oct16550.c b/sys/mips/cavium/uart_dev_oct16550.c
index a7a54b3..2238b95 100644
--- a/sys/mips/cavium/uart_dev_oct16550.c
+++ b/sys/mips/cavium/uart_dev_oct16550.c
@@ -73,7 +73,6 @@ __FBSDID("$FreeBSD$");
 #include <mips/cavium/octeon_pcmap_regs.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
 
 #include "uart_if.h"
 
@@ -460,19 +459,6 @@ oct16550_bus_attach (struct uart_softc *sc)
 	uart_setreg(bas, REG_IER, oct16550->ier);
 	uart_barrier(bas);
 
-	/*
-	 * Enable the interrupt in CIU.     // UART-x2 @ IP2
-	 */
-	switch (unit) {
-	case 0:
-		cvmx_interrupt_unmask_irq(CVMX_IRQ_UART0);
-		break;
-	case 1:
-		cvmx_interrupt_unmask_irq(CVMX_IRQ_UART1);
-		break;
-	default:
-		panic("%s: invalid UART %d", __func__, unit);
-	}
 	return (0);
 }
 
diff --git a/sys/mips/cavium/usb/octusb_octeon.c b/sys/mips/cavium/usb/octusb_octeon.c
index 3108758..c699aef 100644
--- a/sys/mips/cavium/usb/octusb_octeon.c
+++ b/sys/mips/cavium/usb/octusb_octeon.c
@@ -58,7 +58,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/usb/usb_bus.h>
 
 #include <contrib/octeon-sdk/cvmx.h>
-#include <contrib/octeon-sdk/cvmx-interrupt.h>
+#include <mips/cavium/octeon_irq.h>
 #include <contrib/octeon-sdk/cvmx-usb.h>
 
 #include <mips/cavium/usb/octusb.h>
@@ -116,7 +116,7 @@ octusb_octeon_attach(device_t dev)
 		rid = 0;
 		sc->sc_dci.sc_irq_res[i] =
 		    bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-			       CVMX_IRQ_USB0 + i, CVMX_IRQ_USB0 + i, 1, RF_ACTIVE);
+			       OCTEON_IRQ_USB0 + i, OCTEON_IRQ_USB0 + i, 1, RF_ACTIVE);
 		if (!(sc->sc_dci.sc_irq_res[i])) {
 			goto error;
 		}