diff options
author | jmallett <jmallett@FreeBSD.org> | 2011-01-09 23:05:46 +0000 |
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committer | jmallett <jmallett@FreeBSD.org> | 2011-01-09 23:05:46 +0000 |
commit | db62f5eeb502519f7c229d55593fea1fd9738bd1 (patch) | |
tree | cd5c373574260625f2ad8d4993f14f714586e5b1 /sys/mips/cavium/octe | |
parent | ebbca2a885e113d724fb0d1239b047d0f8a6623d (diff) | |
download | FreeBSD-src-db62f5eeb502519f7c229d55593fea1fd9738bd1.zip FreeBSD-src-db62f5eeb502519f7c229d55593fea1fd9738bd1.tar.gz |
o) Remove some unused local definitions of IP protocol numbers.
o) Use CPU_FOREACH rather than a miscrafted for loop with an off-by-one to
enable workq interrupts on all cores.
Diffstat (limited to 'sys/mips/cavium/octe')
-rw-r--r-- | sys/mips/cavium/octe/ethernet-defines.h | 2 | ||||
-rw-r--r-- | sys/mips/cavium/octe/ethernet.c | 19 |
2 files changed, 10 insertions, 11 deletions
diff --git a/sys/mips/cavium/octe/ethernet-defines.h b/sys/mips/cavium/octe/ethernet-defines.h index 52260dc..2192977 100644 --- a/sys/mips/cavium/octe/ethernet-defines.h +++ b/sys/mips/cavium/octe/ethernet-defines.h @@ -79,8 +79,6 @@ AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR W #define USE_MULTICORE_RECEIVE 0 #endif -#define IP_PROTOCOL_TCP 6 -#define IP_PROTOCOL_UDP 0x11 #define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - sizeof(uint32_t)) #define TOTAL_NUMBER_OF_PORTS (CVMX_PIP_NUM_INPUT_PORTS+1) diff --git a/sys/mips/cavium/octe/ethernet.c b/sys/mips/cavium/octe/ethernet.c index 2717d2c..24ff979 100644 --- a/sys/mips/cavium/octe/ethernet.c +++ b/sys/mips/cavium/octe/ethernet.c @@ -235,15 +235,16 @@ static void cvm_oct_configure_common_hw(device_t bus) if (USE_MULTICORE_RECEIVE) { critical_enter(); { - int cpu; - for (cpu = 0; cpu < mp_maxid; cpu++) { - if (!CPU_ABSENT(cpu) && - (cpu != PCPU_GET(cpuid))) { - cvmx_ciu_intx0_t en; - en.u64 = cvmx_read_csr(CVMX_CIU_INTX_EN0(cpu*2)); - en.s.workq |= (1<<pow_receive_group); - cvmx_write_csr(CVMX_CIU_INTX_EN0(cpu*2), en.u64); - } + cvmx_ciu_intx0_t en; + int core; + + CPU_FOREACH(core) { + if (core == PCPU_GET(cpuid)) + continue; + + en.u64 = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2)); + en.s.workq |= (1<<pow_receive_group); + cvmx_write_csr(CVMX_CIU_INTX_EN0(core*2), en.u64); } } critical_exit(); |