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authoradrian <adrian@FreeBSD.org>2015-03-02 01:23:59 +0000
committeradrian <adrian@FreeBSD.org>2015-03-02 01:23:59 +0000
commitb5a61383acc8f39dde55a586248a2b42fa5d12ac (patch)
tree6f5790a3888d390f4f59d52b11d4f6159d476d1c /sys/mips/atheros
parentc2c73916400917344cd96df888f35b4002e6697c (diff)
downloadFreeBSD-src-b5a61383acc8f39dde55a586248a2b42fa5d12ac.zip
FreeBSD-src-b5a61383acc8f39dde55a586248a2b42fa5d12ac.tar.gz
Add a MII mode for SGMII.
This appears on the AR934x and later chips, although it's not something that's programmed via the arge0/arge1 register space. It's just cosmetic.
Diffstat (limited to 'sys/mips/atheros')
-rw-r--r--sys/mips/atheros/ar71xxreg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h
index f12c0df..e1f533b 100644
--- a/sys/mips/atheros/ar71xxreg.h
+++ b/sys/mips/atheros/ar71xxreg.h
@@ -273,6 +273,7 @@ typedef enum {
AR71XX_MII_MODE_MII,
AR71XX_MII_MODE_RGMII,
AR71XX_MII_MODE_RMII,
+ AR71XX_MII_MODE_SGMII /* not hardware defined, though! */
} ar71xx_mii_mode;
/*
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