diff options
| author | adrian <adrian@FreeBSD.org> | 2015-03-02 01:53:47 +0000 |
|---|---|---|
| committer | adrian <adrian@FreeBSD.org> | 2015-03-02 01:53:47 +0000 |
| commit | 1ee8c32e32190656433395bc34fad99f1b9833a8 (patch) | |
| tree | 4a1b1c20747a8489e755c595fa05717fe3148f5e /sys/mips/atheros | |
| parent | b5a61383acc8f39dde55a586248a2b42fa5d12ac (diff) | |
| download | FreeBSD-src-1ee8c32e32190656433395bc34fad99f1b9833a8.zip FreeBSD-src-1ee8c32e32190656433395bc34fad99f1b9833a8.tar.gz | |
Add initial QCA955x support to if_arge.c.
Tested:
* AP135 development board, QCA9558 SoC.
Diffstat (limited to 'sys/mips/atheros')
| -rw-r--r-- | sys/mips/atheros/if_arge.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/sys/mips/atheros/if_arge.c b/sys/mips/atheros/if_arge.c index e88f1e8..1db0e32 100644 --- a/sys/mips/atheros/if_arge.c +++ b/sys/mips/atheros/if_arge.c @@ -92,6 +92,7 @@ MODULE_VERSION(arge, 1); #include <mips/atheros/ar71xxreg.h> #include <mips/atheros/ar934xreg.h> /* XXX tsk! */ +#include <mips/atheros/qca955xreg.h> /* XXX tsk! */ #include <mips/atheros/if_argevar.h> #include <mips/atheros/ar71xx_setup.h> #include <mips/atheros/ar71xx_cpudef.h> @@ -111,7 +112,8 @@ static const char * arge_miicfg_str[] = { "GMII", "MII", "RGMII", - "RMII" + "RMII", + "SGMII" }; #ifdef ARGE_DEBUG @@ -319,6 +321,7 @@ arge_reset_mac(struct arge_softc *sc) /* * AR934x (and later) also needs the MDIO block reset. + * XXX should methodize this! */ if (ar71xx_soc == AR71XX_SOC_AR9341 || ar71xx_soc == AR71XX_SOC_AR9342 || @@ -329,6 +332,15 @@ arge_reset_mac(struct arge_softc *sc) reset_reg |= AR934X_RESET_GE1_MDIO; } } + + if (ar71xx_soc == AR71XX_SOC_QCA9556 || + ar71xx_soc == AR71XX_SOC_QCA9558) { + if (sc->arge_mac_unit == 0) { + reset_reg |= QCA955X_RESET_GE0_MDIO; + } else { + reset_reg |= QCA955X_RESET_GE1_MDIO; + } + } ar71xx_device_stop(reset_reg); DELAY(100); ar71xx_device_start(reset_reg); @@ -400,6 +412,8 @@ arge_mdio_get_divider(struct arge_softc *sc, unsigned long mdio_clock) case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: + case AR71XX_SOC_QCA9556: + case AR71XX_SOC_QCA9558: table = ar933x_mdio_div_table; ndivs = nitems(ar933x_mdio_div_table); break; @@ -489,6 +503,8 @@ arge_fetch_mdiobus_clock_rate(struct arge_softc *sc) case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: + case AR71XX_SOC_QCA9556: + case AR71XX_SOC_QCA9558: return (MAC_MII_CFG_CLOCK_DIV_58); break; default: @@ -793,6 +809,8 @@ arge_attach(device_t dev) case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: + case AR71XX_SOC_QCA9556: + case AR71XX_SOC_QCA9558: ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff); ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x015500aa); break; @@ -1126,6 +1144,8 @@ arge_set_pll(struct arge_softc *sc, int media, int duplex) case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: + case AR71XX_SOC_QCA9556: + case AR71XX_SOC_QCA9558: fifo_tx = 0x01f00140; break; case AR71XX_SOC_AR9130: |
