The AR913x MII speed configuration matches the AR71xx MII configuration.

So share the code.

Don't do it for the AR724x - that has a completely different set of PLL
and MII configuration parameters.

3 files changed, 4 insertions, 9 deletions

diff --git a/sys/mips/atheros/ar71xx_chip.c b/sys/mips/atheros/ar71xx_chip.c
index 3f19964..18181ae 100644
--- a/sys/mips/atheros/ar71xx_chip.c
+++ b/sys/mips/atheros/ar71xx_chip.c
@@ -136,7 +136,7 @@ ar71xx_chip_device_stopped(uint32_t mask)
 	return ((reg & mask) == mask);
 }
 
-static void
+void
 ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed)
 {
 	uint32_t val, reg, ctrl;
diff --git a/sys/mips/atheros/ar71xx_chip.h b/sys/mips/atheros/ar71xx_chip.h
index ccecc23..4869f31 100644
--- a/sys/mips/atheros/ar71xx_chip.h
+++ b/sys/mips/atheros/ar71xx_chip.h
@@ -30,5 +30,6 @@
 #define	__AR71XX_CHIP_H__
 
 extern struct ar71xx_cpu_def ar71xx_chip_def;
+extern void ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed);
 
 #endif
diff --git a/sys/mips/atheros/ar91xx_chip.c b/sys/mips/atheros/ar91xx_chip.c
index 931d446..c88518f 100644
--- a/sys/mips/atheros/ar91xx_chip.c
+++ b/sys/mips/atheros/ar91xx_chip.c
@@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$");
 
 #include <mips/atheros/ar71xxreg.h>
 #include <mips/atheros/ar71xx_cpudef.h>
+#include <mips/atheros/ar71xx_chip.h>
 #include <mips/atheros/ar91xxreg.h>
 #include <mips/atheros/ar91xx_chip.h>
 
@@ -111,13 +112,6 @@ ar91xx_chip_device_stopped(uint32_t mask)
 }
 
 static void
-ar91xx_chip_set_mii_speed(uint32_t unit, uint32_t speed)
-{
-	/* XXX TODO */
-}
-
-
-static void
 ar91xx_chip_set_pll_ge(int unit, int speed)
 {
 	uint32_t pll;
@@ -216,7 +210,7 @@ struct ar71xx_cpu_def ar91xx_chip_def = {
 	&ar91xx_chip_device_start,
 	&ar91xx_chip_device_stopped,
 	&ar91xx_chip_set_pll_ge,
-	&ar91xx_chip_set_mii_speed,
+	&ar71xx_chip_set_mii_speed,
 	&ar91xx_chip_ddr_flush_ge,
 	&ar91xx_chip_get_eth_pll,
 	&ar91xx_chip_ddr_flush_ip2,