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authorraj <raj@FreeBSD.org>2008-03-03 17:17:00 +0000
committerraj <raj@FreeBSD.org>2008-03-03 17:17:00 +0000
commit0757a4afb5d18c5b874cc918eb56d7264456bd20 (patch)
treeb0d8321058cccbf59aa2e7cd69b9283a0663316e /sys/kern/subr_witness.c
parent05437e53d55e216714c2e1f4a0aa97d4598090b8 (diff)
downloadFreeBSD-src-0757a4afb5d18c5b874cc918eb56d7264456bd20.zip
FreeBSD-src-0757a4afb5d18c5b874cc918eb56d7264456bd20.tar.gz
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555. The following major integrated peripherals are supported: * On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality) This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
Diffstat (limited to 'sys/kern/subr_witness.c')
-rw-r--r--sys/kern/subr_witness.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/kern/subr_witness.c b/sys/kern/subr_witness.c
index c5402c7..9e2ac7d 100644
--- a/sys/kern/subr_witness.c
+++ b/sys/kern/subr_witness.c
@@ -434,6 +434,9 @@ static struct witness_order_list_entry order_lists[] = {
#ifdef SMP
{ "smp rendezvous", &lock_class_mtx_spin },
#endif
+#ifdef __powerpc__
+ { "tlb0", &lock_class_mtx_spin },
+#endif
/*
* leaf locks
*/
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