- Add the interrupt vector number to intr_event_create so MI code can

   lookup hard interrupt events by number.  Ignore the irq# for soft intrs.
 - Add support to cpuset for binding hardware interrupts.  This has the
   side effect of binding any ithread associated with the hard interrupt.
   As per restrictions imposed by MD code we can only bind interrupts to
   a single cpu presently.  Interrupts can be 'unbound' by binding them
   to all cpus.

Reviewed by:	jhb
Sponsored by:	Nokia

1 files changed, 16 insertions, 0 deletions

diff --git a/sys/kern/kern_cpuset.c b/sys/kern/kern_cpuset.c
index 23d0510..22b6677 100644
--- a/sys/kern/kern_cpuset.c
+++ b/sys/kern/kern_cpuset.c
@@ -412,6 +412,8 @@ cpuset_which(cpuwhich_t which, id_t id, struct proc **pp, struct thread **tdp,
 			return (0);
 		}
 		return (ESRCH);
+	case CPU_WHICH_IRQ:
+		return (0);
 	default:
 		return (EINVAL);
 	}
@@ -760,6 +762,8 @@ cpuset_getid(struct thread *td, struct cpuset_getid_args *uap)
 		break;
 	case CPU_WHICH_CPUSET:
 		break;
+	case CPU_WHICH_IRQ:
+		return (EINVAL);
 	}
 	switch (uap->level) {
 	case CPU_LEVEL_ROOT:
@@ -820,6 +824,9 @@ cpuset_getaffinity(struct thread *td, struct cpuset_getaffinity_args *uap)
 			break;
 		case CPU_WHICH_CPUSET:
 			break;
+		case CPU_WHICH_IRQ:
+			error = EINVAL;
+			goto out;
 		}
 		if (uap->level == CPU_LEVEL_ROOT)
 			nset = cpuset_refroot(set);
@@ -845,6 +852,9 @@ cpuset_getaffinity(struct thread *td, struct cpuset_getaffinity_args *uap)
 		case CPU_WHICH_CPUSET:
 			CPU_COPY(&set->cs_mask, mask);
 			break;
+		case CPU_WHICH_IRQ:
+			error = intr_getaffinity(uap->id, mask);
+			break;
 		}
 		break;
 	default:
@@ -921,6 +931,9 @@ cpuset_setaffinity(struct thread *td, struct cpuset_setaffinity_args *uap)
 			break;
 		case CPU_WHICH_CPUSET:
 			break;
+		case CPU_WHICH_IRQ:
+			error = EINVAL;
+			goto out;
 		}
 		if (uap->level == CPU_LEVEL_ROOT)
 			nset = cpuset_refroot(set);
@@ -946,6 +959,9 @@ cpuset_setaffinity(struct thread *td, struct cpuset_setaffinity_args *uap)
 				cpuset_rel(set);
 			}
 			break;
+		case CPU_WHICH_IRQ:
+			error = intr_setaffinity(uap->id, mask);
+			break;
 		default:
 			error = EINVAL;
 			break;