In pci_cfgregread() and pci_cfgregwrite(), multiplex the domain and

bus number into the bus argument. The bus number occupies the least
significant 8 bits. The PCI domain occupies the most significant 24
bits.

On the Altix 350, the PCI domain is a required parameter, but
changing the prototype of the pci_cfgreg*() functions to include a
separate domain argument has wide-spread consequences across the
supported architectures. We'd be changing a known interface.

Multiplexing is an acceptable kluge to give us what we need with
manageable impact. Note that the PCI bus number fits in 8 bits,
so the multiplexing of the domain is a backward compatible change.

1 files changed, 2 insertions, 2 deletions

diff --git a/sys/ia64/pci/pci_cfgreg.c b/sys/ia64/pci/pci_cfgreg.c
index 00d8397..e3f472b 100644
--- a/sys/ia64/pci/pci_cfgreg.c
+++ b/sys/ia64/pci/pci_cfgreg.c
@@ -70,7 +70,7 @@ pci_cfgregread(int bus, int slot, int func, int reg, int len)
 	register_t is;
 	u_long addr;
 
-	addr = pci_sal_address(0, bus, slot, func, reg);
+	addr = pci_sal_address(bus >> 8, bus & 0xff, slot, func, reg);
 	if (addr == ~0ul)
 		return (~0);
 
@@ -91,7 +91,7 @@ pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, int len)
 	register_t is;
 	u_long addr;
 
-	addr = pci_sal_address(0, bus, slot, func, reg);
+	addr = pci_sal_address(bus >> 8, bus & 0xff, slot, func, reg);
 	if (addr == ~0ul)
 		return;