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| author | dfr <dfr@FreeBSD.org> | 2000-09-29 15:41:43 +0000 |
|---|---|---|
| committer | dfr <dfr@FreeBSD.org> | 2000-09-29 15:41:43 +0000 |
| commit | 26e3a50f835c5191b49b459859e164e40ade7910 (patch) | |
| tree | 007575e6e3cd849ef034b395333b134e3b442242 /sys/ia64 | |
| parent | 70fa508eceff345606270a2d5580730213fc602a (diff) | |
| download | FreeBSD-src-26e3a50f835c5191b49b459859e164e40ade7910.zip FreeBSD-src-26e3a50f835c5191b49b459859e164e40ade7910.tar.gz | |
Use write-back instead of write-combining for region 7.
Diffstat (limited to 'sys/ia64')
| -rw-r--r-- | sys/ia64/ia64/exception.S | 4 | ||||
| -rw-r--r-- | sys/ia64/ia64/exception.s | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/ia64/ia64/exception.S b/sys/ia64/ia64/exception.S index 0f06ef0..14a303e 100644 --- a/sys/ia64/ia64/exception.S +++ b/sys/ia64/ia64/exception.S @@ -203,7 +203,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX ;; dep r16=0,r16,50,14 // clear bits above PPN @@ -226,7 +226,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW ;; dep r16=0,r16,50,14 // clear bits above PPN diff --git a/sys/ia64/ia64/exception.s b/sys/ia64/ia64/exception.s index 0f06ef0..14a303e 100644 --- a/sys/ia64/ia64/exception.s +++ b/sys/ia64/ia64/exception.s @@ -203,7 +203,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX ;; dep r16=0,r16,50,14 // clear bits above PPN @@ -226,7 +226,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW ;; dep r16=0,r16,50,14 // clear bits above PPN |
