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| author | marcel <marcel@FreeBSD.org> | 2008-02-14 18:46:50 +0000 |
|---|---|---|
| committer | marcel <marcel@FreeBSD.org> | 2008-02-14 18:46:50 +0000 |
| commit | 257f2d8fc2d6f9e98f16196ad31a552be87e33f9 (patch) | |
| tree | 9733d59af46f580b2765066f2ec831be08f21988 /sys/ia64 | |
| parent | 9713f1f445b6ba1d2c2b46e10a1c5b61b5633763 (diff) | |
| download | FreeBSD-src-257f2d8fc2d6f9e98f16196ad31a552be87e33f9.zip FreeBSD-src-257f2d8fc2d6f9e98f16196ad31a552be87e33f9.tar.gz | |
On Montecito processors, the instruction cache is in fact not
coherent with the data caches. Implement a quick fix to allow
us to boot on Montecito, while I'm working on a better fix in
the mean time.
Commit made on Montecito-based Itanium...
Diffstat (limited to 'sys/ia64')
| -rw-r--r-- | sys/ia64/ia64/machdep.c | 6 | ||||
| -rw-r--r-- | sys/ia64/ia64/pmap.c | 13 |
2 files changed, 19 insertions, 0 deletions
diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c index 0c28f2b..6e98bd0 100644 --- a/sys/ia64/ia64/machdep.c +++ b/sys/ia64/ia64/machdep.c @@ -100,6 +100,9 @@ __FBSDID("$FreeBSD$"); #include <i386/include/specialreg.h> +/* XXX fc.i kluge (quick fix) */ +extern int ia64_icache_sync_kluge; + u_int64_t processor_frequency; u_int64_t bus_frequency; u_int64_t itc_frequency; @@ -218,6 +221,9 @@ identifycpu(void) } break; case 0x20: + /* XXX fc.i kluge (quick fix) */ + ia64_icache_sync_kluge = 1; + family_name = "Itanium 2"; switch (model) { case 0x00: diff --git a/sys/ia64/ia64/pmap.c b/sys/ia64/ia64/pmap.c index c5bfba1..0f51240 100644 --- a/sys/ia64/ia64/pmap.c +++ b/sys/ia64/ia64/pmap.c @@ -118,6 +118,9 @@ __FBSDID("$FreeBSD$"); /* XXX move to a header. */ extern uint64_t ia64_gateway_page[]; +/* XXX fc.i kluge (quick fix) */ +int ia64_icache_sync_kluge; + MALLOC_DEFINE(M_PMAP, "PMAP", "PMAP Structures"); #ifndef PMAP_SHPGPERPROC @@ -1183,6 +1186,7 @@ static void pmap_set_pte(struct ia64_lpte *pte, vm_offset_t va, vm_offset_t pa, boolean_t wired, boolean_t managed) { + vm_offset_t lim; pte->pte &= PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK | PTE_ED; pte->pte |= PTE_PRESENT | PTE_MA_WB; @@ -1193,6 +1197,15 @@ pmap_set_pte(struct ia64_lpte *pte, vm_offset_t va, vm_offset_t pa, pte->itir = PAGE_SHIFT << 2; pte->tag = ia64_ttag(va); + + /* XXX fc.i kluge (quick fix) */ + if (ia64_icache_sync_kluge) { + lim = va + PAGE_SIZE; + while (va < lim) { + __asm __volatile("fc.i %0" :: "r"(va)); + va += 32; + } + } } /* |
