Add the following functions/macros to support byte order conversions and

device drivers for bus system with other endinesses than the CPU (using
interfaces compatible to NetBSD):

- bwap16() and bswap32(). These have optimized implementations on some
  architectures; for those that don't, there exist generic implementations.
- macros to convert from a certain byte order to host byte order and vice
  versa, using a naming scheme like le16toh(), htole16().
  These are implemented using the bswap functions.
- stream bus space access functions, which do not perform a byte order
  conversion (while the normal access functions would if the bus endianess
  differs from the CPU endianess).

htons(), htonl(), ntohs() and ntohl() are implemented using the new
functions above for kernel usage. None of the above interfaces is currently
exported to user land.

Make use of the new functions in a few places where local implementations
of the same functionality existed.

Reviewed by:	mike, bde
Tested on alpha by:	mike

2 files changed, 81 insertions, 23 deletions

diff --git a/sys/ia64/include/bus.h b/sys/ia64/include/bus.h
index 724d1d5..d7231c4 100644
--- a/sys/ia64/include/bus.h
+++ b/sys/ia64/include/bus.h
@@ -1000,6 +1000,70 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1,
 #endif
 }
 
+/*
+ * Stream accesses are the same as normal accesses on ia64; there are no
+ * supported bus systems with an endianess different from the host one.
+ */
+#define	bus_space_read_stream_1(t, h, o)	bus_space_read_1((t), (h), (o))
+#define	bus_space_read_stream_2(t, h, o)	bus_space_read_2((t), (h), (o))
+#define	bus_space_read_stream_4(t, h, o)	bus_space_read_4((t), (h), (o))
+
+#define	bus_space_read_multi_stream_1(t, h, o, a, c) \
+	bus_space_read_multi_1((t), (h), (o), (a), (c))
+#define	bus_space_read_multi_stream_2(t, h, o, a, c) \
+	bus_space_read_multi_2((t), (h), (o), (a), (c))
+#define	bus_space_read_multi_stream_4(t, h, o, a, c) \
+	bus_space_read_multi_4((t), (h), (o), (a), (c))
+
+#define	bus_space_write_stream_1(t, h, o, v) \
+	bus_space_write_1((t), (h), (o), (v))
+#define	bus_space_write_stream_2(t, h, o, v) \
+	bus_space_write_2((t), (h), (o), (v))
+#define	bus_space_write_stream_4(t, h, o, v) \
+	bus_space_write_4((t), (h), (o), (v))
+
+#define	bus_space_write_multi_stream_1(t, h, o, a, c) \
+	bus_space_write_multi_1((t), (h), (o), (a), (c))
+#define	bus_space_write_multi_stream_2(t, h, o, a, c) \
+	bus_space_write_multi_2((t), (h), (o), (a), (c))
+#define	bus_space_write_multi_stream_4(t, h, o, a, c) \
+	bus_space_write_multi_4((t), (h), (o), (a), (c))
+
+#define	bus_space_set_multi_stream_1(t, h, o, v, c) \
+	bus_space_set_multi_1((t), (h), (o), (v), (c))
+#define	bus_space_set_multi_stream_2(t, h, o, v, c) \
+	bus_space_set_multi_2((t), (h), (o), (v), (c))
+#define	bus_space_set_multi_stream_4(t, h, o, v, c) \
+	bus_space_set_multi_4((t), (h), (o), (v), (c))
+
+#define	bus_space_read_region_stream_1(t, h, o, a, c) \
+	bus_space_read_region_1((t), (h), (o), (a), (c))
+#define	bus_space_read_region_stream_2(t, h, o, a, c) \
+	bus_space_read_region_2((t), (h), (o), (a), (c))
+#define	bus_space_read_region_stream_4(t, h, o, a, c) \
+	bus_space_read_region_4((t), (h), (o), (a), (c))
+
+#define	bus_space_write_region_stream_1(t, h, o, a, c) \
+	bus_space_write_region_1((t), (h), (o), (a), (c))
+#define	bus_space_write_region_stream_2(t, h, o, a, c) \
+	bus_space_write_region_2((t), (h), (o), (a), (c))
+#define	bus_space_write_region_stream_4(t, h, o, a, c) \
+	bus_space_write_region_4((t), (h), (o), (a), (c))
+
+#define	bus_space_set_region_stream_1(t, h, o, v, c) \
+	bus_space_set_region_1((t), (h), (o), (v), (c))
+#define	bus_space_set_region_stream_2(t, h, o, v, c) \
+	bus_space_set_region_2((t), (h), (o), (v), (c))
+#define	bus_space_set_region_stream_4(t, h, o, v, c) \
+	bus_space_set_region_4((t), (h), (o), (v), (c))
+
+#define	bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
+	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
+#define	bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
+	bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
+#define	bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
+	bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
+
 #endif /* defined(_MACHINE_BUS_PIO_H_) || defined(_MACHINE_BUS_MEMIO_H_) */
 
 #if 0	/* Cause a link error for bus_space_copy_8 */
diff --git a/sys/ia64/include/endian.h b/sys/ia64/include/endian.h
index c1efac9..fe927a2 100644
--- a/sys/ia64/include/endian.h
+++ b/sys/ia64/include/endian.h
@@ -59,12 +59,12 @@
 #define	BYTE_ORDER	LITTLE_ENDIAN
 #endif /* !_POSIX_SOURCE */
 
+#ifdef _KERNEL
 #ifdef __GNUC__
 
-__BEGIN_DECLS
-
+#define	_BSWAP64_DEFINED
 static __inline __uint64_t
-__uint8_swap_uint64(__uint64_t __x)
+__bswap64(__uint64_t __x)
 {
 	__uint64_t __r;
 	__asm __volatile("mux1 %0=%1,@rev"
@@ -72,36 +72,30 @@ __uint8_swap_uint64(__uint64_t __x)
 	return __r;
 }
 
+#define	_BSWAP32_DEFINED
 static __inline __uint32_t
-__htonl(__uint32_t __x)
+__bswap32(__uint32_t __x)
 {
 
-	return (__uint8_swap_uint64(__x) >> 32);
+	return (__bswap64(__x) >> 32);
 }
 
+#define	_BSWAP16_DEFINED
 static __inline __uint16_t
-__htons(__uint16_t __x)
+__bswap16(__uint16_t __x)
 {
 
-	return (__uint8_swap_uint64(__x) >> 48);
+	return (__bswap64(__x) >> 48);
 }
 
-static __inline __uint32_t
-__ntohl(__uint32_t __x)
-{
-
-	return (__uint8_swap_uint64(__x) >> 32);
-}
-
-static __inline __uint16_t
-__ntohs(__uint16_t __x)
-{
-
-	return (__uint8_swap_uint64(__x) >> 48);
-}
-
-__END_DECLS
-
+#else /* !__GNUC__ */
+/* XXX: use the libkern versions for now; these might go away soon. */
+#define	_BSWAP16_DEFINED
+__uint16_t __bswap16(__uint16_t);
+#define	_BSWAP32_DEFINED
+__uint32_t __bswap32(__uint32_t);
 #endif /* __GNUC__ */
 
+#endif /* _KERNEL */
+
 #endif /* !_MACHINE_ENDIAN_H_ */