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authormarcel <marcel@FreeBSD.org>2014-09-22 20:10:45 +0000
committermarcel <marcel@FreeBSD.org>2014-09-22 20:10:45 +0000
commit33a793a3e6389b4322cbb2871185706462c9cc55 (patch)
tree08b8afb58bb6d417279c8d66d1e44a04c2ef8f59 /sys/ia64/ia64
parentc5464156911c7bd41c6f2ce6e02432f355c4764c (diff)
downloadFreeBSD-src-33a793a3e6389b4322cbb2871185706462c9cc55.zip
FreeBSD-src-33a793a3e6389b4322cbb2871185706462c9cc55.tar.gz
Make sure all memory updates are made visible before we let go
of the thread in cpu_switch(). It's otherwise possible that on another CPU the thread continues from stale context data. Note that this is prominent on newer CPUs, like the Montecito, that really take advantage of the weak memory ordering. First generation Itanium 2 is not that aggressive and does not need this. This is a direct commit to stable/10. Approved by: re@ (gjb)
Diffstat (limited to 'sys/ia64/ia64')
-rw-r--r--sys/ia64/ia64/machdep.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c
index e2b26ae..668fa16 100644
--- a/sys/ia64/ia64/machdep.c
+++ b/sys/ia64/ia64/machdep.c
@@ -465,6 +465,8 @@ cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx)
oldpcb->pcb_current_pmap =
pmap_switch(newpcb->pcb_current_pmap);
+ ia64_mf();
+
atomic_store_rel_ptr(&old->td_lock, mtx);
#if defined(SCHED_ULE) && defined(SMP)
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