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author | marcel <marcel@FreeBSD.org> | 2010-02-14 16:56:24 +0000 |
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committer | marcel <marcel@FreeBSD.org> | 2010-02-14 16:56:24 +0000 |
commit | d64c132e246c63213bfdfdc38c07d59eb413b25b (patch) | |
tree | e8e5b400fb18761bbe3cd75bd951531f2fe23aa2 /sys/ia64/ia64/machdep.c | |
parent | 8a3759078068fdea04520bae2eeda9cc36dee98e (diff) | |
download | FreeBSD-src-d64c132e246c63213bfdfdc38c07d59eb413b25b.zip FreeBSD-src-d64c132e246c63213bfdfdc38c07d59eb413b25b.tar.gz |
Some code churn:
o Eliminate IA64_PHYS_TO_RR6 and change all places where the macro is used
by calling either bus_space_map() or pmap_mapdev().
o Implement bus_space_map() in terms of pmap_mapdev() and implement
bus_space_unmap() in terms of pmap_unmapdev().
o Have ia64_pib hold the uncached virtual address of the processor interrupt
block throughout the kernel's life and access the elements of the PIB
through this structure pointer.
This is a non-functional change with the exception of using ia64_ld1() and
ia64_st8() to write to the PIB. We were still using assignments, for which
the compiler generates semaphore reads -- which cause undefined behaviour
for uncacheable memory. Note also that the memory barriers in ipi_send() are
critical for proper functioning.
With all the mapping of uncached memory done by pmap_mapdev(), we can keep
track of the translations and wire them in the CPU. This then eliminates
the need to reserve a whole region for uncached I/O and it eliminates
translation traps for device I/O accesses.
Diffstat (limited to 'sys/ia64/ia64/machdep.c')
-rw-r--r-- | sys/ia64/ia64/machdep.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c index 8bebde2..cddf6c0 100644 --- a/sys/ia64/ia64/machdep.c +++ b/sys/ia64/ia64/machdep.c @@ -85,6 +85,7 @@ __FBSDID("$FreeBSD$"); #include <machine/efi.h> #include <machine/elf.h> #include <machine/fpu.h> +#include <machine/intr.h> #include <machine/mca.h> #include <machine/md_var.h> #include <machine/mutex.h> @@ -134,6 +135,10 @@ struct fpswa_iface *fpswa_iface; u_int64_t ia64_pal_base; u_int64_t ia64_port_base; +u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR; + +struct ia64_pib *ia64_pib; + static int ia64_sync_icache_needed; char machine[] = MACHINE; @@ -308,6 +313,8 @@ cpu_startup(void *dummy) * information. */ ia64_probe_sapics(); + ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib)); + ia64_mca_init(); /* @@ -677,7 +684,8 @@ ia64_init(void) for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { switch (md->md_type) { case EFI_MD_TYPE_IOPORT: - ia64_port_base = IA64_PHYS_TO_RR6(md->md_phys); + ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys, + md->md_pages * EFI_PAGE_SIZE); break; case EFI_MD_TYPE_PALCODE: ia64_pal_base = md->md_phys; |