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authormarcel <marcel@FreeBSD.org>2010-03-17 00:37:15 +0000
committermarcel <marcel@FreeBSD.org>2010-03-17 00:37:15 +0000
commita16f0fefdce804c5d60c0aea44277f2cb95d3751 (patch)
tree23d71a6afc74f7cdf6522ea5d3b42da8cb8da732 /sys/ia64/ia64/machdep.c
parent2dfc25c8f6e619ae6f2fa6a28450a37450fea036 (diff)
downloadFreeBSD-src-a16f0fefdce804c5d60c0aea44277f2cb95d3751.zip
FreeBSD-src-a16f0fefdce804c5d60c0aea44277f2cb95d3751.tar.gz
Revamp the interrupt code based on the previous commit:
o Introduce XIV, eXternal Interrupt Vector, to differentiate from the interrupts vectors that are offsets in the IVT (Interrupt Vector Table). There's a vector for external interrupts, which are based on the XIVs. o Keep track of allocated and reserved XIVs so that we can assign XIVs without hardcoding anything. When XIVs are allocated, an interrupt handler and a class is specified for the XIV. Classes are: 1. architecture-defined: XIV 15 is returned when no external interrupt are pending, 2. platform-defined: SAL reports which XIV is used to wakeup an AP (typically 0xFF, but it's 0x12 for the Altix 350). 3. inter-processor interrupts: allocated for SMP support and non-redirectable. 4. device interrupts (i.e. IRQs): allocated when devices are discovered and are redirectable. o Rewrite the central interrupt handler to call the per-XIV interrupt handler and rename it to ia64_handle_intr(). Move the per-XIV handler implementation to the file where we have the XIV allocation/reservation. Clock interrupt handling is moved to clock.c. IPI handling is moved to mp_machdep.c. o Drop support for the Intel 8259A because it was broken. When XIV 0 is received, the CPU should initiate an INTA cycle to obtain the interrupt vector of the 8259-based interrupt. In these cases the interrupt controller we should be talking to WRT to masking on signalling EOI is the 8259 and not the I/O SAPIC. This requires adriver for the Intel 8259A which isn't available for ia64. Thus stop pretending to support ExtINTs and instead panic() so that if we come across hardware that has an Intel 8259A, so have something real to work with. o With XIVs for IPIs dynamically allocatedi and also based on priority, define the IPI_* symbols as variables rather than constants. The variable holds the XIV allocated for the IPI. o IPI_STOP_HARD delivers a NMI if possible. Otherwise the XIV assigned to IPI_STOP is delivered.
Diffstat (limited to 'sys/ia64/ia64/machdep.c')
-rw-r--r--sys/ia64/ia64/machdep.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c
index ed7a288..fd1bc2a 100644
--- a/sys/ia64/ia64/machdep.c
+++ b/sys/ia64/ia64/machdep.c
@@ -371,7 +371,7 @@ cpu_startup(void *dummy)
SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
"nstrays", CTLFLAG_RD, &pcs->pcs_nstrays,
- "Number of stray vectors");
+ "Number of stray interrupts");
}
}
SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
@@ -781,6 +781,7 @@ ia64_init(void)
*/
map_pal_code();
efi_boot_minimal(bootinfo.bi_systab);
+ ia64_xiv_init();
ia64_sal_init();
calculate_frequencies();
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