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author | jkoshy <jkoshy@FreeBSD.org> | 2008-11-09 17:37:54 +0000 |
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committer | jkoshy <jkoshy@FreeBSD.org> | 2008-11-09 17:37:54 +0000 |
commit | fdb59f927ee739bbda9db671e11bf83d5a3143f3 (patch) | |
tree | 9977abc62b812534217ab29faac7edc58cae0570 /sys/i386 | |
parent | 957a6ed81ce56e8deae2eb8eb5082acf7bbfe234 (diff) | |
download | FreeBSD-src-fdb59f927ee739bbda9db671e11bf83d5a3143f3.zip FreeBSD-src-fdb59f927ee739bbda9db671e11bf83d5a3143f3.tar.gz |
- Separate PMC class dependent code from other kinds of machine
dependencies. A 'struct pmc_classdep' structure describes operations
on PMCs; 'struct pmc_mdep' contains one or more 'struct pmc_classdep'
structures depending on the CPU in question.
Inside PMC class dependent code, row indices are relative to the
PMCs supported by the PMC class; MI code in "hwpmc_mod.c" translates
global row indices before invoking class dependent operations.
- Augment the OP_GETCPUINFO request with the number of PMCs present
in a PMC class.
- Move code common to Intel CPUs to file "hwpmc_intel.c".
- Move TSC handling to file "hwpmc_tsc.c".
Diffstat (limited to 'sys/i386')
-rw-r--r-- | sys/i386/include/pmc_mdep.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/sys/i386/include/pmc_mdep.h b/sys/i386/include/pmc_mdep.h index de0688a..720f1f3 100644 --- a/sys/i386/include/pmc_mdep.h +++ b/sys/i386/include/pmc_mdep.h @@ -33,21 +33,43 @@ #ifndef _MACHINE_PMC_MDEP_H #define _MACHINE_PMC_MDEP_H 1 +#ifdef _KERNEL +struct pmc_mdep; +#endif + /* * On the i386 platform we support the following PMCs. * + * TSC The timestamp counter * K7 AMD Athlon XP/MP and other 32 bit processors. * K8 AMD Athlon64 and Opteron PMCs in 32 bit mode. * PIV Intel P4/HTT and P4/EMT64 * PPRO Intel Pentium Pro, Pentium-II, Pentium-III, Celeron and * Pentium-M processors * PENTIUM Intel Pentium MMX. + * IAP Intel Core/Core2/Atom programmable PMCs. + * IAF Intel fixed-function PMCs. */ #include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */ #include <dev/hwpmc/hwpmc_piv.h> #include <dev/hwpmc/hwpmc_ppro.h> #include <dev/hwpmc/hwpmc_pentium.h> +#include <dev/hwpmc/hwpmc_tsc.h> + +/* + * Intel processors implementing V2 and later of the Intel performance + * measurement architecture have PMCs of the following classes: TSC, + * IAF and IAP. + */ +#define PMC_MDEP_CLASS_INDEX_TSC 0 +#define PMC_MDEP_CLASS_INDEX_K7 1 +#define PMC_MDEP_CLASS_INDEX_K8 1 +#define PMC_MDEP_CLASS_INDEX_P4 1 +#define PMC_MDEP_CLASS_INDEX_P5 1 +#define PMC_MDEP_CLASS_INDEX_P6 1 +#define PMC_MDEP_CLASS_INDEX_IAF 1 +#define PMC_MDEP_CLASS_INDEX_IAP 2 /* * Architecture specific extensions to <sys/pmc.h> structures. @@ -76,6 +98,7 @@ union pmc_md_pmc { }; struct pmc; +struct pmc_mdep; #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_eip) #define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_ebp) @@ -124,5 +147,10 @@ struct pmc; void start_exceptions(void), end_exceptions(void); void pmc_x86_lapic_enable_pmc_interrupt(void); +struct pmc_mdep *pmc_amd_initialize(void); +void pmc_amd_finalize(struct pmc_mdep *_md); +struct pmc_mdep *pmc_intel_initialize(void); +void pmc_intel_finalize(struct pmc_mdep *_md); + #endif /* _KERNEL */ #endif /* _MACHINE_PMC_MDEP_H */ |