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authorjkim <jkim@FreeBSD.org>2010-11-16 23:26:02 +0000
committerjkim <jkim@FreeBSD.org>2010-11-16 23:26:02 +0000
commit5e8d82f5f9ee8a86838565d1f59213077cccf79c (patch)
treefac36dee5ce8005d7531a9defd8fdea9fe63cb53 /sys/i386
parenta14ade4fc3540f33d8511dd0571455fb1e0f222b (diff)
downloadFreeBSD-src-5e8d82f5f9ee8a86838565d1f59213077cccf79c.zip
FreeBSD-src-5e8d82f5f9ee8a86838565d1f59213077cccf79c.tar.gz
Restore CR0 after MTRR initialization for correctness sakes. There will be
no noticeable change because we enable caches before we enter here for both BSP and AP cases. Remove another pointless optimization for CR4.PGE bit while I am here.
Diffstat (limited to 'sys/i386')
-rw-r--r--sys/i386/i386/i686_mem.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/sys/i386/i386/i686_mem.c b/sys/i386/i386/i686_mem.c
index f8580cd..a8d8baf 100644
--- a/sys/i386/i386/i686_mem.c
+++ b/sys/i386/i386/i686_mem.c
@@ -301,17 +301,17 @@ i686_mrstoreone(void *arg)
struct mem_range_desc *mrd;
u_int64_t omsrv, msrv;
int i, j, msr;
- u_int cr4save;
+ u_long cr0, cr4;
mrd = sc->mr_desc;
/* Disable PGE. */
- cr4save = rcr4();
- if (cr4save & CR4_PGE)
- load_cr4(cr4save & ~CR4_PGE);
+ cr4 = rcr4();
+ load_cr4(cr4 & ~CR4_PGE);
/* Disable caches (CD = 1, NW = 0). */
- load_cr0((rcr0() & ~CR0_NW) | CR0_CD);
+ cr0 = rcr0();
+ load_cr0((cr0 & ~CR0_NW) | CR0_CD);
/* Flushes caches and TLBs. */
wbinvd();
@@ -390,11 +390,9 @@ i686_mrstoreone(void *arg)
/* Enable MTRRs. */
wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
- /* Enable caches (CD = 0, NW = 0). */
- load_cr0(rcr0() & ~(CR0_CD | CR0_NW));
-
- /* Restore PGE. */
- load_cr4(cr4save);
+ /* Restore caches and PGE. */
+ load_cr0(cr0);
+ load_cr4(cr4);
}
/*
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