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authorjhb <jhb@FreeBSD.org>2007-11-28 22:20:08 +0000
committerjhb <jhb@FreeBSD.org>2007-11-28 22:20:08 +0000
commit2a71fa9467ab04c43782066c416b3a78c5f04d18 (patch)
treef932011f2008f64cae5aa90e55c93d4f06e0b570 /sys/i386/pci
parent22ebcc078a4fb976178e2d0eea4c0d1387d8ccf6 (diff)
downloadFreeBSD-src-2a71fa9467ab04c43782066c416b3a78c5f04d18.zip
FreeBSD-src-2a71fa9467ab04c43782066c416b3a78c5f04d18.tar.gz
Adjust the code to probe for the PCI config mechanism to use.
- On amd64, just assume type #1 is always used. PCI 2.0 mandated deprecated type #2 and required type #1 for all future bridges which was well before amd64 existed. - For i386, ignore whatever value was in 0xcf8 before testing for type #1 and instead rely on the other tests to determine if type #1 works. Some newer machines leave garbage in 0xcf8 during boot and as a result the kernel doesn't find PCI at all (which greatly confuses ACPI which expects PCI to exist when PCI busses are in the namespace). MFC after: 3 days Discussed with: scottl
Diffstat (limited to 'sys/i386/pci')
-rw-r--r--sys/i386/pci/pci_cfgreg.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c
index a6c80ae..9bdfe29 100644
--- a/sys/i386/pci/pci_cfgreg.c
+++ b/sys/i386/pci/pci_cfgreg.c
@@ -403,6 +403,7 @@ pcireg_cfgopen(void)
uint32_t mode1res, oldval1;
uint8_t mode2res, oldval2;
+ /* Check for type #1 first. */
oldval1 = inl(CONF1_ADDR_PORT);
if (bootverbose) {
@@ -410,39 +411,37 @@ pcireg_cfgopen(void)
oldval1);
}
- if ((oldval1 & CONF1_ENABLE_MSK) == 0) {
-
- cfgmech = CFGMECH_1;
- devmax = 32;
+ cfgmech = CFGMECH_1;
+ devmax = 32;
- outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK);
- DELAY(1);
- mode1res = inl(CONF1_ADDR_PORT);
- outl(CONF1_ADDR_PORT, oldval1);
+ outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK);
+ DELAY(1);
+ mode1res = inl(CONF1_ADDR_PORT);
+ outl(CONF1_ADDR_PORT, oldval1);
- if (bootverbose)
- printf("pci_open(1a):\tmode1res=0x%08x (0x%08lx)\n",
- mode1res, CONF1_ENABLE_CHK);
+ if (bootverbose)
+ printf("pci_open(1a):\tmode1res=0x%08x (0x%08lx)\n", mode1res,
+ CONF1_ENABLE_CHK);
- if (mode1res) {
- if (pci_cfgcheck(32))
- return (cfgmech);
- }
+ if (mode1res) {
+ if (pci_cfgcheck(32))
+ return (cfgmech);
+ }
- outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK1);
- mode1res = inl(CONF1_ADDR_PORT);
- outl(CONF1_ADDR_PORT, oldval1);
+ outl(CONF1_ADDR_PORT, CONF1_ENABLE_CHK1);
+ mode1res = inl(CONF1_ADDR_PORT);
+ outl(CONF1_ADDR_PORT, oldval1);
- if (bootverbose)
- printf("pci_open(1b):\tmode1res=0x%08x (0x%08lx)\n",
- mode1res, CONF1_ENABLE_CHK1);
+ if (bootverbose)
+ printf("pci_open(1b):\tmode1res=0x%08x (0x%08lx)\n", mode1res,
+ CONF1_ENABLE_CHK1);
- if ((mode1res & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) {
- if (pci_cfgcheck(32))
- return (cfgmech);
- }
+ if ((mode1res & CONF1_ENABLE_MSK1) == CONF1_ENABLE_RES1) {
+ if (pci_cfgcheck(32))
+ return (cfgmech);
}
+ /* Type #1 didn't work, so try type #2. */
oldval2 = inb(CONF2_ENABLE_PORT);
if (bootverbose) {
@@ -472,6 +471,7 @@ pcireg_cfgopen(void)
}
}
+ /* Nothing worked, so punt. */
cfgmech = CFGMECH_NONE;
devmax = 0;
return (cfgmech);
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