summaryrefslogtreecommitdiffstats
path: root/sys/i386/isa/ipl_funcs.c
diff options
context:
space:
mode:
authorfsmp <fsmp@FreeBSD.org>1997-08-24 20:33:32 +0000
committerfsmp <fsmp@FreeBSD.org>1997-08-24 20:33:32 +0000
commit30f7c300787da5cd36c457b534171c77ea9ea74d (patch)
treea828988fb0b3e20b7593c923dec662cbb651b044 /sys/i386/isa/ipl_funcs.c
parentd40888900736de743238ffe1d525e535bc260a99 (diff)
downloadFreeBSD-src-30f7c300787da5cd36c457b534171c77ea9ea74d.zip
FreeBSD-src-30f7c300787da5cd36c457b534171c77ea9ea74d.tar.gz
A clean fix for the spl "deadlock before smp_active" problem.
Added a new variable, 'bsp_apic_ready', which is set as soon as the bootstrap CPU has initialized its local APIC. Conditionalize the GENSPLR functions to call ss_lock ONLY after bsp_apic_ready is TRUE; This should prevent any problems with races between the time the 1st AP becomes ready and the time smp_active is set.
Diffstat (limited to 'sys/i386/isa/ipl_funcs.c')
-rw-r--r--sys/i386/isa/ipl_funcs.c41
1 files changed, 22 insertions, 19 deletions
diff --git a/sys/i386/isa/ipl_funcs.c b/sys/i386/isa/ipl_funcs.c
index 0532249..78977eb 100644
--- a/sys/i386/isa/ipl_funcs.c
+++ b/sys/i386/isa/ipl_funcs.c
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: ipl_funcs.c,v 1.3 1997/08/24 00:05:18 fsmp Exp $
+ * $Id: ipl_funcs.c,v 1.7 1997/08/24 20:18:28 smp Exp smp $
*/
#include <sys/types.h>
@@ -98,6 +98,7 @@ splx(unsigned ipl)
#include <machine/param.h>
#include <machine/smp.h>
+extern int bspEarly; /* XXX */
#if defined(REAL_IFCPL)
@@ -146,6 +147,7 @@ softclockpending(void)
}
+#ifdef notneeded
#define GENSPL(name, set_cpl) \
unsigned name(void) \
{ \
@@ -159,38 +161,39 @@ unsigned name(void) \
\
return (x); \
}
+#endif /* notneeded */
/*
- * This version has to check for smp_active,
+ * This version has to check for bsp_apic_ready,
* as calling simple_lock() (ie ss_lock) before then deadlocks the system.
+ * A sample count of GENSPLR calls before bsp_apic_ready was set: 2193
*/
-#define GENSPL2(name, set_cpl) \
+#define GENSPLR(name, set_cpl) \
unsigned name(void) \
{ \
unsigned x; \
\
- if (smp_active) \
+ if (bsp_apic_ready) \
IFCPL_LOCK(); \
x = cpl; \
/* XXX test cil */ \
set_cpl; \
- if (smp_active) \
+ if (bsp_apic_ready) \
IFCPL_UNLOCK(); \
\
return (x); \
}
-GENSPL2(splbio, cpl |= bio_imask)
-GENSPL2(splclock, cpl = HWI_MASK | SWI_MASK)
-GENSPL2(splimp, cpl |= net_imask)
-GENSPL2(splnet, cpl |= SWI_NET_MASK)
-GENSPL2(splsoftclock, cpl = SWI_CLOCK_MASK)
-GENSPL2(splsofttty, cpl |= SWI_TTY_MASK)
-GENSPL2(splstatclock, cpl |= stat_imask)
-GENSPL2(splvm, cpl |= net_imask | bio_imask)
-
-GENSPL2(splhigh, cpl = HWI_MASK | SWI_MASK)
-GENSPL2(spltty, cpl |= tty_imask)
+GENSPLR(splbio, cpl |= bio_imask)
+GENSPLR(splclock, cpl = HWI_MASK | SWI_MASK)
+GENSPLR(splhigh, cpl = HWI_MASK | SWI_MASK)
+GENSPLR(splimp, cpl |= net_imask)
+GENSPLR(splnet, cpl |= SWI_NET_MASK)
+GENSPLR(splsoftclock, cpl = SWI_CLOCK_MASK)
+GENSPLR(splsofttty, cpl |= SWI_TTY_MASK)
+GENSPLR(splstatclock, cpl |= stat_imask)
+GENSPLR(spltty, cpl |= tty_imask)
+GENSPLR(splvm, cpl |= net_imask | bio_imask)
void
@@ -211,18 +214,18 @@ spl0(void)
void
splx(unsigned ipl)
{
- if (smp_active)
+ if (bsp_apic_ready)
IFCPL_LOCK();
/* XXX test cil */
cpl = ipl;
if (ipending & ~ipl) {
- if (smp_active)
+ if (bsp_apic_ready)
IFCPL_UNLOCK();
splz();
}
else
- if (smp_active)
+ if (bsp_apic_ready)
IFCPL_UNLOCK();
}
OpenPOWER on IntegriCloud