diff options
author | asami <asami@FreeBSD.org> | 1996-09-12 11:12:18 +0000 |
---|---|---|
committer | asami <asami@FreeBSD.org> | 1996-09-12 11:12:18 +0000 |
commit | eb29d43f47d2764ad43636b3330ead07bc46bd57 (patch) | |
tree | 7a5dd9f80c049a86290c39b23a26fb62a527daa9 /sys/i386/isa/ic | |
parent | 0db650cebc177b2f5bd89b47d0ede89ccbef2bfe (diff) | |
download | FreeBSD-src-eb29d43f47d2764ad43636b3330ead07bc46bd57.zip FreeBSD-src-eb29d43f47d2764ad43636b3330ead07bc46bd57.tar.gz |
Another round of merge/update.
(1) Add PC98 support to apm_bios.h and ns16550.h, remove pc98/pc98/ic
(2) Move PC98 specific code out of cpufunc.h (to pc98.h)
(3) Let the boot subtrees look more alike
Submitted by: The FreeBSD(98) Development Team
<freebsd98-hackers@jp.freebsd.org>
Diffstat (limited to 'sys/i386/isa/ic')
-rw-r--r-- | sys/i386/isa/ic/i8251.h | 79 | ||||
-rw-r--r-- | sys/i386/isa/ic/ns16550.h | 17 | ||||
-rw-r--r-- | sys/i386/isa/ic/wd33c93.h | 127 |
3 files changed, 221 insertions, 2 deletions
diff --git a/sys/i386/isa/ic/i8251.h b/sys/i386/isa/ic/i8251.h new file mode 100644 index 0000000..f11c916 --- /dev/null +++ b/sys/i386/isa/ic/i8251.h @@ -0,0 +1,79 @@ +/*- + * Copyright (c) 1991 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)ns16550.h 7.1 (Berkeley) 5/9/91 + */ + +/* + * modified for PC9801 by M.Ishii + * Kyoto University Microcomputer Club (KMC) + */ + +/* define command and status code */ +#define CMD8251_TxEN 0x01 /* transmit enable */ +#define CMD8251_DTR 0x02 /* assert DTR */ +#define CMD8251_RxEN 0x04 /* receive enable */ +#define CMD8251_SBRK 0x08 /* send break */ +#define CMD8251_ER 0x10 /* error reset */ +#define CMD8251_RTS 0x20 /* assert RTS */ +#define CMD8251_RESET 0x40 /* internal reset */ +#define CMD8251_EH 0x80 /* enter hunt mode (only synchronous mode)*/ + +#define STS8251_TxRDY 0x01 /* transmit READY */ +#define STS8251_RxRDY 0x02 /* data exists in receive buffer */ +#define STS8251_TxEMP 0x04 /* transmit buffer EMPTY */ +#define STS8251_PE 0x08 /* perity error */ +#define STS8251_OE 0x10 /* overrun error */ +#define STS8251_FE 0x20 /* framing error */ +#define STS8251_BD_SD 0x40 /* break detect (async) / sync detect (sync) */ +#define STS8251_DSR 0x80 /* DSR is asserted */ + +#define MOD8251_5BITS 0x00 +#define MOD8251_6BITS 0x04 +#define MOD8251_7BITS 0x08 +#define MOD8251_8BITS 0x0c +#define MOD8251_PDISAB 0x00 /* parity disable */ +#define MOD8251_PODD 0x10 /* parity odd */ +#define MOD8251_PEVEN 0x30 /* parity even */ +#define MOD8251_STOP1 0x40 /* stop bit len = 1bit */ +#define MOD8251_STOP2 0xc0 /* stop bit len = 2bit */ +#define MOD8251_CLKX16 0x02 /* x16 */ +#define MOD8251_CLKX1 0x01 /* x1 */ + +#define CICSCD_CI 0x80 /* CI */ +#define CICSCD_CS 0x40 /* CS */ +#define CICSCD_CD 0x20 /* CD */ + +/* interrupt mask control */ +#define IEN_Rx 0x01 +#define IEN_TxEMP 0x02 +#define IEN_Tx 0x04 diff --git a/sys/i386/isa/ic/ns16550.h b/sys/i386/isa/ic/ns16550.h index ff59757..dae85bc 100644 --- a/sys/i386/isa/ic/ns16550.h +++ b/sys/i386/isa/ic/ns16550.h @@ -31,13 +31,25 @@ * SUCH DAMAGE. * * from: @(#)ns16550.h 7.1 (Berkeley) 5/9/91 - * $Id$ + * $Id: ns16550.h,v 1.2 1993/10/16 13:48:52 rgrimes Exp $ */ /* * NS16550 UART registers */ - +#ifdef PC98 +#define com_data 0x000 /* data register (R/W) */ +#define com_dlbl 0x000 /* divisor latch low (W) */ +#define com_dlbh 0x100 /* divisor latch high (W) */ +#define com_ier 0x100 /* interrupt enable (W) */ +#define com_iir 0x200 /* interrupt identification (R) */ +#define com_fifo 0x200 /* FIFO control (W) */ +#define com_lctl 0x300 /* line control register (R/W) */ +#define com_cfcr 0x300 /* line control register (R/W) */ +#define com_mcr 0x400 /* modem control register (R/W) */ +#define com_lsr 0x500 /* line status register (R/W) */ +#define com_msr 0x600 /* modem status register (R/W) */ +#else /* IBM-PC */ #define com_data 0 /* data register (R/W) */ #define com_dlbl 0 /* divisor latch low (W) */ #define com_dlbh 1 /* divisor latch high (W) */ @@ -49,3 +61,4 @@ #define com_mcr 4 /* modem control register (R/W) */ #define com_lsr 5 /* line status register (R/W) */ #define com_msr 6 /* modem status register (R/W) */ +#endif /* PC98 */ diff --git a/sys/i386/isa/ic/wd33c93.h b/sys/i386/isa/ic/wd33c93.h new file mode 100644 index 0000000..f1aa7f9 --- /dev/null +++ b/sys/i386/isa/ic/wd33c93.h @@ -0,0 +1,127 @@ +/* + * PC9801 SCSI I/F (PC-9801-55) + * modified for PC9801 by A.Kojima + * Kyoto University Microcomputer Club (KMC) + */ + +/* I/O address */ + +/* WD33C93 */ +#define SCSI_ADR_REG 0xcc0 /* write Address Register */ +#define SCSI_AUX_REG 0xcc0 /* read Aux. Status Register */ +#define SCSI_CTL_REG 0xcc2 /* read/write Control Registers */ + +/* Port */ +#define SCSI_STAT_RD 0xcc4 /* read Status Read */ +#define SCSI_CMD_WRT 0xcc4 /* write Command Write */ + +#if 0 /* H98 extended mode */ +/* WD33C93 */ +#define SCSI_ADR_REG 0xee0 /* write Address Register */ +#define SCSI_AUX_REG 0xee0 /* read Control Register */ +#define SCSI_CTL_REG 0xee2 /* read/write Registers */ + +/* Port */ +#define SCSI_STAT_RD 0xee4 /* read Status Read */ +#define SCSI_CMD_WRT 0xee4 /* write Command Write */ +#endif + +/****************************************************************/ + +/* WD33C93 Registers */ +#define REG_OWN_ID 0x00 /* Own ID */ +#define REG_CONTROL 0x01 /* Control */ +#define REG_TIMEOUT_PERIOD 0x02 /* Timeout Period */ +#define REG_TOTAL_SECTORS 0x03 /* Total Sectors */ +#define REG_TOTAL_HEADS 0x04 /* Total Heads */ +#define REG_TOTAL_CYL_H 0x05 /* Total Cylinders (MSB) */ +#define REG_TOTAL_CYL_L 0x06 /* Total Cylinders (LSB) */ +#define REG_LOG_SECTOR_HH 0x07 /* Logical Address (MSB) */ +#define REG_LOG_SECTOR_HL 0x08 /* Logical Address */ +#define REG_LOG_SECTOR_LH 0x09 /* Logical Address */ +#define REG_LOG_SECTOR_LL 0x0a /* Logical Address (LSB) */ +#define REG_SECTOR_NUMBER 0x0b /* Sector Number */ +#define REG_HEAD_NUMBER 0x0c /* Head Number */ +#define REG_CYL_NUMBER_H 0x0d /* Cylinder Number (MSB) */ +#define REG_CYL_NUMBER_L 0x0e /* Cylinder Number (LSB) */ +#define REG_TARGET_LUN 0x0f /* Target LUN */ +#define REG_CMD_PHASE 0x10 /* Command Phase */ +#define REG_SYNC_TFR 0x11 /* Synchronous Transfer */ +#define REG_TFR_COUNT_H 0x12 /* Transfer Count (MSB) */ +#define REG_TFR_COUNT_M 0x13 /* Transfer Count */ +#define REG_TFR_COUNT_L 0x14 /* Transfer Count (LSB) */ +#define REG_DST_ID 0x15 /* Destination ID */ +#define REG_SRC_ID 0x16 /* Source ID */ +#define REG_SCSI_STATUS 0x17 /* SCSI Status (Read Only) */ +#define REG_COMMAND 0x18 /* Command */ +#define REG_DATA 0x19 /* Data */ + +/* PC98 only */ +#define REG_MEM_BANK 0x30 /* Memory Bank */ +#define REG_MEM_WIN 0x31 /* Memery Window */ +#define REG_RESERVED1 0x32 /* NEC Reserved 1 */ +#define REG_RESET_INT 0x33 /* Reset/Int */ +#define REG_RESERVED2 0x34 /* NEC Reserved 2 */ + +/****************************************************************/ + +/* WD33C93 Commands */ +#define CMD_RESET 0x00 /* Reset */ +#define CMD_ABORT 0x01 /* Abort */ +#define CMD_ASSERT_ATN 0x02 /* Assert ATN */ +#define CMD_NEGATE_ATN 0x03 /* Negate ATN */ +#define CMD_DISCONNECT 0x04 /* Disconnect */ +#define CMD_RESELECT 0x05 /* Reselect */ +#define CMD_SELECT_ATN 0x06 /* Select with ATN */ +#define CMD_SELECT_NO_ATN 0x07 /* Select without ATN */ +#define CMD_SELECT_ATN_TFR 0x08 /* Select with ATN and Transfer */ +#define CMD_SELECT_NO_ATN_TFR 0x09 /* Select without ATN and Transfer */ +#define CMD_RESELECT_RCV_DATA 0x0a /* Reselect and Recieve Data */ +#define CMD_RESELECT_SEND_DATA 0x0b /* Reselect and Send Data */ +#define CMD_WAIT_SELECT_RCV 0x0c /* Wait for Select and Recieve */ +#define CMD_RCV_CMD 0x10 /* Recieve Command */ +#define CMD_RCV_DATA 0x11 /* Recieve Data */ +#define CMD_RCV_MSG_OUT 0x12 /* Recieve Message Info Out*/ +#define CMD_RCV_UNSP_INFO_OUT 0x13 /* Recieve Unspecified Info Out */ +#define CMD_SEND_STATUS 0x14 /* Send Status */ +#define CMD_SEND_DATA 0x15 /* Send Data */ +#define CMD_SEND_MSG_IN 0x16 /* Send Message In */ +#define CMD_SEND_UNSP_INFO_IN 0x17 /* Send Unspecified Info In */ +#define CMD_TRANSLATE_ADDRESS 0x18 /* Translate Address */ +#define CMD_TFR_INFO 0x20 /* Transfer Info */ +#define CMD_TFR_PAD 0x21 /* Transfer Pad */ +#define CMD_SBT_SFX 0x80 /* single byte suffix */ + +/* WD33C93 bus status register (lower nibble) */ +#define STAT_DATAOUT 0x08 /* Data out phase */ +#define STAT_DATAIN 0x09 /* Data in phase */ +#define STAT_CMDOUT 0x0a /* Command out phase */ +#define STAT_STATIN 0x0b /* Status in phase */ +#define STAT_MSGOUT 0x0e /* Message out phase */ +#define STAT_MSGIN 0x0f /* Message in phase */ + +/* SCSI Status byte */ +#define SS_GOOD 0x00 /* Good status */ +#define SS_CHKCOND 0x02 +#define SS_MET 0x04 +#define SS_BUSY 0x08 +#define SS_INTERGOOD 0x10 +#define SS_INTERMET 0x14 +#define SS_CONFLICT 0x18 + +/* SCSI message system */ +#define MSG_COMPLETE 0x00 /* Command complete message */ +#define MSG_EXTEND 0x01 /* Extend message */ +#define MSG_SAVEPTR 0x02 /* Save data pointer message */ +#define MSG_RESTORE 0x03 /* Restore data pointer message */ +#define MSG_DISCON 0x04 /* Disconnect message */ +#define MSG_INIERROR 0x05 +#define MSG_ABORT 0x06 +#define MSG_REJECT 0x07 +#define MSG_NOP 0x08 +#define MSG_PARERROR 0x09 +#define MSG_LCOMPLETE 0x0a +#define MSG_LCOMPLETEF 0x0b +#define MSG_DEVRESET 0x0c +#define MSG_IDENTIFY 0x80 /* Identify message */ + |