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authorjhb <jhb@FreeBSD.org>2001-12-20 23:48:31 +0000
committerjhb <jhb@FreeBSD.org>2001-12-20 23:48:31 +0000
commit2463f40fc340e69b97e1ba3f1a7db47384b50a83 (patch)
treedec76d77f99795635c90df0631ffc2beb333b91b /sys/i386/isa/apic_vector.s
parent7a0109b5c0a87d4cff83c1923789cf9c5b38126a (diff)
downloadFreeBSD-src-2463f40fc340e69b97e1ba3f1a7db47384b50a83.zip
FreeBSD-src-2463f40fc340e69b97e1ba3f1a7db47384b50a83.tar.gz
Introduce a standard name for the lock protecting an interrupt controller
and it's associated state variables: icu_lock with the name "icu". This renames the imen_mtx for x86 SMP, but also uses the lock to protect access to the 8259 PIC on x86 UP. This also adds an appropriate lock to the various Alpha chipsets which fixes problems with Alpha SMP machines dropping interrupts with an SMP kernel.
Diffstat (limited to 'sys/i386/isa/apic_vector.s')
-rw-r--r--sys/i386/isa/apic_vector.s10
1 files changed, 4 insertions, 6 deletions
diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s
index 3d7a687..6147b31 100644
--- a/sys/i386/isa/apic_vector.s
+++ b/sys/i386/isa/apic_vector.s
@@ -7,8 +7,6 @@
#include <machine/apic.h>
#include <machine/smp.h>
-#include "i386/isa/intr_machdep.h"
-
/* convert an absolute IRQ# into a bitmask */
#define IRQ_BIT(irq_num) (1 << (irq_num))
@@ -67,7 +65,7 @@ IDTVEC(vec_name) ; \
#define REDIRIDX(irq_num) CNAME(int_to_apicintpin) + 16 * (irq_num) + 12
#define MASK_IRQ(irq_num) \
- IMASK_LOCK ; /* into critical reg */ \
+ ICU_LOCK ; /* into critical reg */ \
testl $IRQ_BIT(irq_num), apic_imen ; \
jne 7f ; /* masked, don't mask */ \
orl $IRQ_BIT(irq_num), apic_imen ; /* set the mask bit */ \
@@ -78,7 +76,7 @@ IDTVEC(vec_name) ; \
orl $IOART_INTMASK, %eax ; /* set the mask */ \
movl %eax, IOAPIC_WINDOW(%ecx) ; /* new value */ \
7: ; /* already masked */ \
- IMASK_UNLOCK
+ ICU_UNLOCK
/*
* Test to see whether we are handling an edge or level triggered INT.
* Level-triggered INTs must still be masked as we don't clear the source,
@@ -113,7 +111,7 @@ IDTVEC(vec_name) ; \
* Test to see if the source is currently masked, clear if so.
*/
#define UNMASK_IRQ(irq_num) \
- IMASK_LOCK ; /* into critical reg */ \
+ ICU_LOCK ; /* into critical reg */ \
testl $IRQ_BIT(irq_num), _apic_imen ; \
je 7f ; /* bit clear, not masked */ \
andl $~IRQ_BIT(irq_num), _apic_imen ;/* clear mask bit */ \
@@ -124,7 +122,7 @@ IDTVEC(vec_name) ; \
andl $~IOART_INTMASK, %eax ; /* clear the mask */ \
movl %eax, IOAPIC_WINDOW(%ecx) ; /* new value */ \
7: ; /* already unmasked */ \
- IMASK_UNLOCK
+ ICU_UNLOCK
/*
* Slow, threaded interrupts.
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