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author | jhb <jhb@FreeBSD.org> | 2008-08-26 17:43:46 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2008-08-26 17:43:46 +0000 |
commit | 0044067c33fc86e104f5955264dbbb10085c09ee (patch) | |
tree | fe8f9a4bb2a2113a90dd4fddda13213b69dc11d1 /sys/i386/cpufreq | |
parent | f016db7e16c7154b323f8c3527342e7672734ed8 (diff) | |
download | FreeBSD-src-0044067c33fc86e104f5955264dbbb10085c09ee.zip FreeBSD-src-0044067c33fc86e104f5955264dbbb10085c09ee.tar.gz |
Disable the code to generate a simple table from the status MSR by default.
This can be enabled by setting the 'hw.est.msr_info' tunable to 1.
Diffstat (limited to 'sys/i386/cpufreq')
-rw-r--r-- | sys/i386/cpufreq/est.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/i386/cpufreq/est.c b/sys/i386/cpufreq/est.c index 594199e..c75a31a 100644 --- a/sys/i386/cpufreq/est.c +++ b/sys/i386/cpufreq/est.c @@ -94,6 +94,8 @@ struct est_softc { const char intel_id[] = "GenuineIntel"; const char centaur_id[] = "CentaurHauls"; +static int msr_info_enabled = 0; +TUNABLE_INT("hw.est.msr_info", &msr_info_enabled); /* Default bus clock value for Centrino processors. */ #define INTEL_BUS_CLK 100 @@ -1196,6 +1198,9 @@ est_msr_info(device_t dev, uint64_t msr, freq_info **freqs) int bus, freq, volts; uint16_t id; + if (!msr_info_enabled) + return (EOPNOTSUPP); + /* Figure out the bus clock. */ freq = tsc_freq / 1000000; id = msr >> 32; |