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authorphk <phk@FreeBSD.org>2008-03-17 08:38:38 +0000
committerphk <phk@FreeBSD.org>2008-03-17 08:38:38 +0000
commit0ef978b0566b6d36332fc699b6e440cc05abd00d (patch)
tree47f20c9c2cc9c44d95e3e65ce2ef9db8782e281b /sys/i386/cpufreq/p4tcc.c
parent1bfcad58c95f136ff0c530c8044cfe175f9f436e (diff)
downloadFreeBSD-src-0ef978b0566b6d36332fc699b6e440cc05abd00d.zip
FreeBSD-src-0ef978b0566b6d36332fc699b6e440cc05abd00d.tar.gz
Increase time we wait for things to settle to 1 millisecond,
10 microseconds is too short. Always set the cpu to the highest frequency so that we get through boot and don't handicap cpus where powerd(8) is not used.
Diffstat (limited to 'sys/i386/cpufreq/p4tcc.c')
-rw-r--r--sys/i386/cpufreq/p4tcc.c31
1 files changed, 26 insertions, 5 deletions
diff --git a/sys/i386/cpufreq/p4tcc.c b/sys/i386/cpufreq/p4tcc.c
index 501aed5..914a7f1 100644
--- a/sys/i386/cpufreq/p4tcc.c
+++ b/sys/i386/cpufreq/p4tcc.c
@@ -151,6 +151,7 @@ p4tcc_attach(device_t dev)
{
struct p4tcc_softc *sc;
struct cf_setting set;
+ unsigned cpu_match;
sc = device_get_softc(dev);
sc->dev = dev;
@@ -164,12 +165,32 @@ p4tcc_attach(device_t dev)
*/
sc->auto_mode = TRUE;
- switch (cpu_id & 0xff) {
+ cpu_match = cpu_id & 0xfff;
+ cpu_match |= (cpu_procinfo & 0xff) << 12;
+ switch (cpu_match) {
+ case 0x0ef22: /* Xeon MP O50(A0) */
+ case 0x0ef25: /* Xeon MP O50(B0) */
+ case 0x0ef26: /* Xeon MP O50(C0) */
+ case 0x0bf22: /* Xeon MP O50(A0) */
+ case 0x0bf25: /* Xeon MP O50(B0) */
+ case 0x0bf26: /* Xeon MP O50(C0) */
+ case 0x0ef29: /* P4 Mobile/533 Z19(D1) */
+ case 0x0ff29: /* P4 Mobile/533 Z19(D1) */
+ case 0x0ef24: /* Xeon P44(B0) */
+ case 0x0ef25: /* Xeon P44(M0) */
+ case 0x0ef27: /* Xeon P44(C1) */
+ case 0x0ef29: /* Xeon P44(L0+D1) */
+ case 0x12695: /* Celeron W7(B-1) */
+ case 0x0d
+ case 0xf22: /* O50(A0) */
+ case 0xf24: /* P44 */
+ case 0xf25: /* P44 O50(B0)*/
+ case 0xf26: /* O50(C0)*/
+ case 0xf27: /* P44 */
+ case 0xf29: /* P44 Z19(D1) */
+ sc->set_count -= 1;
+ break;
case 0x22:
- case 0x24:
- case 0x25:
- case 0x27:
- case 0x29:
/*
* These CPU models hang when set to 12.5%.
* See Errata O50, P44, and Z21.
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