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authorsumikawa <sumikawa@FreeBSD.org>2001-11-19 18:47:49 +0000
committersumikawa <sumikawa@FreeBSD.org>2001-11-19 18:47:49 +0000
commit4410530efb165fbebbcf481000cc8694bcab5baf (patch)
tree8bdbdf539a561ce5b0b8c77d7a738cde9b0b63bb /sys/dev
parentc48e058b808b9b0df5baae843c3fe9a234249c19 (diff)
downloadFreeBSD-src-4410530efb165fbebbcf481000cc8694bcab5baf.zip
FreeBSD-src-4410530efb165fbebbcf481000cc8694bcab5baf.tar.gz
Support MELCO LUA2-TX USB ethernet adaptor.
Actually this porting supports Pegasus II chip so I guess some other devices supported by NetBSD also work. But the devices list are not included because I cannot confirm if they work. Obtained from: NetBSD MFC after: 3 weeks
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/usb/if_aue.c70
-rw-r--r--sys/dev/usb/if_auereg.h7
2 files changed, 45 insertions, 32 deletions
diff --git a/sys/dev/usb/if_aue.c b/sys/dev/usb/if_aue.c
index c68b4b9..64b95e2 100644
--- a/sys/dev/usb/if_aue.c
+++ b/sys/dev/usb/if_aue.c
@@ -106,22 +106,23 @@ static const char rcsid[] =
* Various supported device vendors/products.
*/
Static struct aue_type aue_devs[] = {
- { USB_VENDOR_ADMTEK, USB_PRODUCT_ADMTEK_PEGASUS },
- { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB100 },
- { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUATX1 },
- { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUATX5 },
- { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650 },
- { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650TX },
- { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650TX_PNA },
- { USB_VENDOR_SMC, USB_PRODUCT_SMC_2202USB },
- { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_USB100TX },
- { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_USB10TA },
- { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB_TX },
- { USB_VENDOR_KINGSTON, USB_PRODUCT_KINGSTON_KNU101TX },
- { USB_VENDOR_ABOCOM, USB_PRODUCT_DLINK_DSB650TX_PNA },
- { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_USBETTX },
- { USB_VENDOR_ACCTON, USB_PRODUCT_ACCTON_USB320_EC },
- { 0, 0 }
+ { USB_VENDOR_ADMTEK, USB_PRODUCT_ADMTEK_PEGASUS, 0 },
+ { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB100, 0 },
+ { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUATX1, 0 },
+ { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUATX5, 0 },
+ { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUA2TX5, PII },
+ { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650, LSYS },
+ { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650TX, LSYS },
+ { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DSB650TX_PNA, 0 },
+ { USB_VENDOR_SMC, USB_PRODUCT_SMC_2202USB, 0 },
+ { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_USB100TX, LSYS },
+ { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_USB10TA, LSYS },
+ { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB_TX, 0 },
+ { USB_VENDOR_KINGSTON, USB_PRODUCT_KINGSTON_KNU101TX, 0 },
+ { USB_VENDOR_ABOCOM, USB_PRODUCT_DLINK_DSB650TX_PNA, 0 },
+ { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_USBETTX, 0 },
+ { USB_VENDOR_ACCTON, USB_PRODUCT_ACCTON_USB320_EC, 0 },
+ { 0, 0, 0 }
};
Static struct usb_qdat aue_qdat;
@@ -130,6 +131,7 @@ Static int aue_match __P((device_t));
Static int aue_attach __P((device_t));
Static int aue_detach __P((device_t));
+Static void aue_reset_pegasus_II __P((struct aue_softc *));
Static int aue_tx_list_init __P((struct aue_softc *));
Static int aue_rx_list_init __P((struct aue_softc *));
Static int aue_newbuf __P((struct aue_softc *, struct aue_chain *,
@@ -487,14 +489,7 @@ Static void aue_miibus_statchg(dev)
* This turns on the 'dual link LED' bin in the auxmode
* register of the Broadcom PHY.
*/
- if ((sc->aue_info->aue_vid == USB_VENDOR_LINKSYS &&
- sc->aue_info->aue_did == USB_PRODUCT_LINKSYS_USB100TX) ||
- (sc->aue_info->aue_vid == USB_VENDOR_LINKSYS &&
- sc->aue_info->aue_did == USB_PRODUCT_LINKSYS_USB10TA) ||
- (sc->aue_info->aue_vid == USB_VENDOR_DLINK &&
- sc->aue_info->aue_did == USB_PRODUCT_DLINK_DSB650TX) ||
- (sc->aue_info->aue_vid == USB_VENDOR_DLINK &&
- sc->aue_info->aue_did == USB_PRODUCT_DLINK_DSB650)) {
+ if (sc->aue_info->aue_flags & LSYS) {
u_int16_t auxmode;
auxmode = aue_miibus_readreg(dev, 0, 0x1b);
aue_miibus_writereg(dev, 0, 0x1b, auxmode | 0x04);
@@ -553,6 +548,21 @@ Static void aue_setmulti(sc)
return;
}
+Static void
+aue_reset_pegasus_II(sc)
+ struct aue_softc *sc;
+{
+ /* Magic constants taken from Linux driver. */
+ csr_write_1(sc, AUE_REG_1D, 0);
+ csr_write_1(sc, AUE_REG_7B, 2);
+#if 0
+ if ((sc->aue_flags & HAS_HOME_PNA) && mii_mode)
+ csr_write_1(sc, AUE_REG_81, 6);
+ else
+#endif
+ csr_write_1(sc, AUE_REG_81, 2);
+}
+
Static void aue_reset(sc)
struct aue_softc *sc;
{
@@ -581,19 +591,15 @@ Static void aue_reset(sc)
csr_write_1(sc, AUE_GPIO0, AUE_GPIO_OUT0|AUE_GPIO_SEL0|AUE_GPIO_SEL1);
/* Grrr. LinkSys has to be different from everyone else. */
- if ((sc->aue_info->aue_vid == USB_VENDOR_LINKSYS &&
- sc->aue_info->aue_did == USB_PRODUCT_LINKSYS_USB100TX) ||
- (sc->aue_info->aue_vid == USB_VENDOR_LINKSYS &&
- sc->aue_info->aue_did == USB_PRODUCT_LINKSYS_USB10TA) ||
- (sc->aue_info->aue_vid == USB_VENDOR_DLINK &&
- sc->aue_info->aue_did == USB_PRODUCT_DLINK_DSB650TX) ||
- (sc->aue_info->aue_vid == USB_VENDOR_DLINK &&
- sc->aue_info->aue_did == USB_PRODUCT_DLINK_DSB650)) {
+ if (sc->aue_info->aue_flags & LSYS) {
csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|
AUE_GPIO_OUT0);
}
+ if (sc->aue_info->aue_flags & PII)
+ aue_reset_pegasus_II(sc);
+
/* Wait a little while for the chip to get its brains in order. */
DELAY(10000);
diff --git a/sys/dev/usb/if_auereg.h b/sys/dev/usb/if_auereg.h
index 28ebf7a..6fec3cd 100644
--- a/sys/dev/usb/if_auereg.h
+++ b/sys/dev/usb/if_auereg.h
@@ -103,6 +103,7 @@
#define AUE_PAUSE AUE_PAUSE0
#define AUE_RX_FLOWCTL_CNT 0x1A
#define AUE_RX_FLOWCTL_FIFO 0x1B
+#define AUE_REG_1D 0x1D
#define AUE_EE_REG 0x20
#define AUE_EE_DATA0 0x21
#define AUE_EE_DATA1 0x22
@@ -122,8 +123,10 @@
#define AUE_PKTLOST1 0x2F
#define AUE_PKTLOST AUE_PKTLOST0
+#define AUE_REG_7B 0x7B
#define AUE_GPIO0 0x7E
#define AUE_GPIO1 0x7F
+#define AUE_REG_81 0x81
#define AUE_CTL0_INCLUDE_RXCRC 0x01
#define AUE_CTL0_ALLMULTI 0x02
@@ -205,6 +208,10 @@ struct aue_rxpkt {
struct aue_type {
u_int16_t aue_vid;
u_int16_t aue_did;
+ u_int16_t aue_flags;
+#define LSYS 0x0001 /* use Linksys reset */
+#define PNA 0x0002 /* has Home PNA */
+#define PII 0x0004 /* Pegasus II chip */
};
#define AUE_TX_LIST_CNT 1
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