diff options
author | phk <phk@FreeBSD.org> | 2002-10-16 09:14:59 +0000 |
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committer | phk <phk@FreeBSD.org> | 2002-10-16 09:14:59 +0000 |
commit | 32fb67c36b33ab6d14a82d469c776f287d96e9c0 (patch) | |
tree | ba4045bde297cdb63765059d6a40200ca20ee92f /sys/dev | |
parent | 3f4eea0f283fbdb73c023326a77c63f051a63b93 (diff) | |
download | FreeBSD-src-32fb67c36b33ab6d14a82d469c776f287d96e9c0.zip FreeBSD-src-32fb67c36b33ab6d14a82d469c776f287d96e9c0.tar.gz |
Be consistent about functions being static.
Properly put macro args in ().
Spotted by: FlexeLint.
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/sf/if_sf.c | 4 | ||||
-rw-r--r-- | sys/dev/vr/if_vr.c | 18 |
2 files changed, 11 insertions, 11 deletions
diff --git a/sys/dev/sf/if_sf.c b/sys/dev/sf/if_sf.c index f5df991..69e7c1a 100644 --- a/sys/dev/sf/if_sf.c +++ b/sys/dev/sf/if_sf.c @@ -211,10 +211,10 @@ DRIVER_MODULE(if_sf, pci, sf_driver, sf_devclass, 0, 0); DRIVER_MODULE(miibus, sf, miibus_driver, miibus_devclass, 0, 0); #define SF_SETBIT(sc, reg, x) \ - csr_write_4(sc, reg, csr_read_4(sc, reg) | x) + csr_write_4(sc, reg, csr_read_4(sc, reg) | (x)) #define SF_CLRBIT(sc, reg, x) \ - csr_write_4(sc, reg, csr_read_4(sc, reg) & ~x) + csr_write_4(sc, reg, csr_read_4(sc, reg) & ~(x)) static u_int32_t csr_read_4(sc, reg) diff --git a/sys/dev/vr/if_vr.c b/sys/dev/vr/if_vr.c index f96e0e2..93fdae7 100644 --- a/sys/dev/vr/if_vr.c +++ b/sys/dev/vr/if_vr.c @@ -201,35 +201,35 @@ DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0); #define VR_SETBIT(sc, reg, x) \ CSR_WRITE_1(sc, reg, \ - CSR_READ_1(sc, reg) | x) + CSR_READ_1(sc, reg) | (x)) #define VR_CLRBIT(sc, reg, x) \ CSR_WRITE_1(sc, reg, \ - CSR_READ_1(sc, reg) & ~x) + CSR_READ_1(sc, reg) & ~(x)) #define VR_SETBIT16(sc, reg, x) \ CSR_WRITE_2(sc, reg, \ - CSR_READ_2(sc, reg) | x) + CSR_READ_2(sc, reg) | (x)) #define VR_CLRBIT16(sc, reg, x) \ CSR_WRITE_2(sc, reg, \ - CSR_READ_2(sc, reg) & ~x) + CSR_READ_2(sc, reg) & ~(x)) #define VR_SETBIT32(sc, reg, x) \ CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) | x) + CSR_READ_4(sc, reg) | (x)) #define VR_CLRBIT32(sc, reg, x) \ CSR_WRITE_4(sc, reg, \ - CSR_READ_4(sc, reg) & ~x) + CSR_READ_4(sc, reg) & ~(x)) #define SIO_SET(x) \ CSR_WRITE_1(sc, VR_MIICMD, \ - CSR_READ_1(sc, VR_MIICMD) | x) + CSR_READ_1(sc, VR_MIICMD) | (x)) #define SIO_CLR(x) \ CSR_WRITE_1(sc, VR_MIICMD, \ - CSR_READ_1(sc, VR_MIICMD) & ~x) + CSR_READ_1(sc, VR_MIICMD) & ~(x)) /* * Sync the PHYs by setting data bit and strobing the clock 32 times. @@ -1062,7 +1062,7 @@ vr_rxeof(sc) return; } -void +static void vr_rxeoc(sc) struct vr_softc *sc; { |