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authorats <ats@FreeBSD.org>1994-01-25 22:52:09 +0000
committerats <ats@FreeBSD.org>1994-01-25 22:52:09 +0000
commit991e9ab179de2726ef684e970e7624c68e038258 (patch)
tree7d7f95654eac304c0c7c67ca1e7335e76c84cd52 /sys/dev
parentf26c3f84b8f99b2ce5d38ed68ddb422ab377fafb (diff)
downloadFreeBSD-src-991e9ab179de2726ef684e970e7624c68e038258.zip
FreeBSD-src-991e9ab179de2726ef684e970e7624c68e038258.tar.gz
Put some more info about the toshiba ethernet cards into if_edreg.h.
Changed some numeric constants to defines in if_ed.c for the toshiba cards.
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/ed/if_ed.c18
-rw-r--r--sys/dev/ed/if_edreg.h23
2 files changed, 29 insertions, 12 deletions
diff --git a/sys/dev/ed/if_ed.c b/sys/dev/ed/if_ed.c
index 70aeac2..c4ffdf8 100644
--- a/sys/dev/ed/if_ed.c
+++ b/sys/dev/ed/if_ed.c
@@ -20,7 +20,7 @@
*/
/*
- * $Id: if_ed.c,v 1.27 1994/01/03 17:17:19 davidg Exp $
+ * $Id: if_ed.c,v 1.28 1994/01/11 23:28:21 ats Exp $
*/
#include "ed.h"
@@ -258,7 +258,7 @@ ed_probe_WD80x3(isa_dev)
sc->is790 = 0;
#ifdef TOSH_ETHER
- outb(sc->asic_addr + ED_WD_MSR, 0x2); /* set the power enable bit */
+ outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW);
DELAY(10000);
#endif
/*
@@ -283,7 +283,7 @@ ed_probe_WD80x3(isa_dev)
/* reset card to force it into a known state. */
#ifdef TOSH_ETHER
- outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | 0x2);
+ outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
#else
outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
#endif
@@ -364,8 +364,8 @@ ed_probe_WD80x3(isa_dev)
memsize = 32768;
isa16bit = 1;
break;
- case ED_TYPE_TOSHIBA2:
- sc->type_str = "Toshiba2";
+ case ED_TYPE_TOSHIBA4:
+ sc->type_str = "Toshiba4";
memsize = 32768;
isa16bit = 1;
break;
@@ -382,7 +382,7 @@ ed_probe_WD80x3(isa_dev)
*/
if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
#ifdef TOSH_ETHER
- && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA2)
+ && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
#endif
&& ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
isa16bit = 0;
@@ -501,7 +501,7 @@ ed_probe_WD80x3(isa_dev)
#ifdef TOSH_ETHER
outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4);
outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f));
- outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | 0x2);
+ outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW);
#else
outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
@@ -531,7 +531,7 @@ ed_probe_WD80x3(isa_dev)
} else {
if ((sc->type & ED_WD_SOFTCONFIG) ||
#ifdef TOSH_ETHER
- (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA2) ||
+ (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) ||
#endif
(sc->type == ED_TYPE_WD8013EBT) && (!sc->is790)) {
outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
@@ -1067,7 +1067,7 @@ ed_attach(isa_dev)
printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)");
printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) &&
- (ifp->if_flags & IFF_ALTPHYS)) ? "tranceiver disabled" : "");
+ (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : "");
/*
* If BPF is in the kernel, call the attach for it
diff --git a/sys/dev/ed/if_edreg.h b/sys/dev/ed/if_edreg.h
index 9d65ffa..92aaef2 100644
--- a/sys/dev/ed/if_edreg.h
+++ b/sys/dev/ed/if_edreg.h
@@ -1,7 +1,7 @@
/*
* National Semiconductor DS8390 NIC register definitions
*
- * $Id: if_edreg.h,v 1.9 1993/11/29 17:07:33 davidg Exp $
+ * $Id: if_edreg.h,v 1.10 1994/01/11 21:28:29 ats Exp $
*
* Modification history
*
@@ -605,6 +605,13 @@ struct ed_ring {
#define ED_WD_MSR_ADDR 0x3f /* Memory decode bits 18-13 */
#define ED_WD_MSR_MENB 0x40 /* Memory enable */
#define ED_WD_MSR_RST 0x80 /* Reset board */
+#ifdef TOSH_ETHER
+#define ED_WD_MSR_POW 0x02 /* 0 = power save, 1 = normal (R/W) */
+#define ED_WD_MSR_BSY 0x04 /* gate array busy (R) */
+#define ED_WD_MSR_LEN 0x20 /* data bus width, 0 = 16 bits,
+ 1 = 8 bits (R/W) */
+#endif
+
/*
* Interface Configuration Register (ICR)
@@ -619,6 +626,14 @@ struct ed_ring {
#define ED_WD_ICR_RX7 0x20 /* recall all but i/o and LAN address */
#define ED_WD_ICR_RIO 0x40 /* recall i/o address */
#define ED_WD_ICR_STO 0x80 /* store to non-volatile memory */
+#ifdef TOSH_ETHER
+#define ED_WD_ICR_MEM 0xe0 /* shared mem address A15-A13 (R/W) */
+#define ED_WD_ICR_MSZ1 0x0f /* memory size, 0x08 = 64K, 0x04 = 32K,
+ 0x02 = 16K, 0x01 = 8K */
+ /* 64K can only be used if mem address
+ above 1Mb */
+ /* IAR holds address A23-A16 (R/W) */
+#endif
/*
* IO Address Register (IAR)
@@ -678,8 +693,10 @@ struct ed_ring {
#define ED_TYPE_WD8003S 0x02
#define ED_TYPE_WD8003E 0x03
#define ED_TYPE_WD8013EBT 0x05
-#define ED_TYPE_TOSHIBA1 0x11
-#define ED_TYPE_TOSHIBA2 0x14
+#define ED_TYPE_TOSHIBA1 0x11 /* named PCETA1 */
+#define ED_TYPE_TOSHIBA2 0x12 /* named PCETA2 */
+#define ED_TYPE_TOSHIBA3 0x13 /* named PCETB */
+#define ED_TYPE_TOSHIBA4 0x14 /* named PCETC */
#define ED_TYPE_WD8013W 0x26
#define ED_TYPE_WD8013EP 0x27
#define ED_TYPE_WD8013WC 0x28
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