Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode

provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by:    grehan

2 files changed, 29 insertions, 11 deletions

diff --git a/sys/dev/powermac_nvram/powermac_nvram.c b/sys/dev/powermac_nvram/powermac_nvram.c
index a55fcae..f6e930b 100644
--- a/sys/dev/powermac_nvram/powermac_nvram.c
+++ b/sys/dev/powermac_nvram/powermac_nvram.c
@@ -131,19 +131,25 @@ powermac_nvram_attach(device_t dev)
 {
 	struct powermac_nvram_softc *sc;
 	phandle_t node;
-	u_int32_t reg[2];
-	int gen0, gen1;
+	u_int32_t reg[3];
+	int gen0, gen1, i;
 
 	node = ofw_bus_get_node(dev);
 	sc = device_get_softc(dev);
 
-	if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
+	if ((i = OF_getprop(node, "reg", reg, sizeof(reg))) < 8)
 		return ENXIO;
 
 	sc->sc_dev = dev;
 	sc->sc_node = node;
 
-	sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[0], NVRAM_SIZE * 2);
+	/*
+	 * Find which byte of reg corresponds to the 32-bit physical address.
+	 * We should probably read #address-cells from /chosen instead.
+	 */
+	i = (i/4) - 2;
+
+	sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[i], NVRAM_SIZE * 2);
 	sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE;
 
 	gen0 = powermac_nvram_check((void *)sc->sc_bank0);
diff --git a/sys/dev/uart/uart_cpu_powerpc.c b/sys/dev/uart/uart_cpu_powerpc.c
index 0945970..682cab9 100644
--- a/sys/dev/uart/uart_cpu_powerpc.c
+++ b/sys/dev/uart/uart_cpu_powerpc.c
@@ -31,6 +31,8 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/systm.h>
+#include <vm/vm.h>
+#include <vm/pmap.h>
 
 #include <machine/bus.h>
 
@@ -53,8 +55,7 @@ bus_space_tag_t uart_bus_space_mem = &bs_le_tag;
 int
 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
 {
-
-	return ((b1->bsh == b2->bsh) ? 1 : 0);
+	return ((pmap_kextract(b1->bsh) == pmap_kextract(b2->bsh)) ? 1 : 0);
 }
 
 #ifdef MPC85XX
@@ -116,7 +117,16 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 		return (ENXIO);
 	if (OF_getprop(input, "name", buf, sizeof(buf)) == -1)
 		return (ENXIO);
-	if (strcmp(buf, "ch-a"))
+
+	if (strcmp(buf, "ch-a") == 0) {
+		class = &uart_z8530_class;
+		di->bas.regshft = 4;
+		di->bas.chan = 1;
+	} else if (strcmp(buf,"serial") == 0) {
+		class = &uart_ns8250_class;
+		di->bas.regshft = 0;
+		di->bas.chan = 0;
+	} else
 		return (ENXIO);
 
 	error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh);
@@ -125,11 +135,13 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 
 	di->ops = uart_getops(class);
 
-	di->bas.rclk = 230400;
-	di->bas.chan = 1;
-	di->bas.regshft = 4;
+	if (OF_getprop(input, "clock-frequency", &di->bas.rclk, 
+	    sizeof(di->bas.rclk)) == -1)
+		di->bas.rclk = 230400;
+	if (OF_getprop(input, "current-speed", &di->baudrate, 
+	    sizeof(di->baudrate)) == -1)
+		di->baudrate = 0;
 
-	di->baudrate = 0;
 	di->databits = 8;
 	di->stopbits = 1;
 	di->parity = UART_PARITY_NONE;