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| author | ian <ian@FreeBSD.org> | 2014-12-27 04:35:18 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2014-12-27 04:35:18 +0000 |
| commit | 2226c9830e5d72a114f95fd5cd670b0e81e4fe70 (patch) | |
| tree | ace948873e395199761979db7e5a4066bd33d5a4 /sys/dev | |
| parent | aa8c824e74a74286aae6dae9a136bbd0bb5069ba (diff) | |
| download | FreeBSD-src-2226c9830e5d72a114f95fd5cd670b0e81e4fe70.zip FreeBSD-src-2226c9830e5d72a114f95fd5cd670b0e81e4fe70.tar.gz | |
MFC r274967:
Add busdma sync ops before reading and after modifying the descriptor rings
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/ffec/if_ffec.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sys/dev/ffec/if_ffec.c b/sys/dev/ffec/if_ffec.c index 3acec6e..ae634c2 100644 --- a/sys/dev/ffec/if_ffec.c +++ b/sys/dev/ffec/if_ffec.c @@ -653,7 +653,9 @@ ffec_txstart_locked(struct ffec_softc *sc) } if (enqueued != 0) { + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREWRITE); WR4(sc, FEC_TDAR_REG, FEC_TDAR_TDAR); + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTWRITE); sc->tx_watchdog_count = WATCHDOG_TIMEOUT_SECS; } } @@ -678,6 +680,9 @@ ffec_txfinish_locked(struct ffec_softc *sc) FFEC_ASSERT_LOCKED(sc); + /* XXX Can't set PRE|POST right now, but we need both. */ + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREREAD); + bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTREAD); ifp = sc->ifp; retired_buffer = false; while (sc->tx_idx_tail != sc->tx_idx_head) { @@ -842,6 +847,9 @@ ffec_rxfinish_locked(struct ffec_softc *sc) FFEC_ASSERT_LOCKED(sc); + /* XXX Can't set PRE|POST right now, but we need both. */ + bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_PREREAD); + bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_POSTREAD); produced_empty_buffer = false; for (;;) { desc = &sc->rxdesc_ring[sc->rx_idx]; @@ -889,7 +897,9 @@ ffec_rxfinish_locked(struct ffec_softc *sc) } if (produced_empty_buffer) { + bus_dmamap_sync(sc->rxdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREWRITE); WR4(sc, FEC_RDAR_REG, FEC_RDAR_RDAR); + bus_dmamap_sync(sc->rxdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTWRITE); } } |
