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authormbr <mbr@FreeBSD.org>2003-01-10 08:09:58 +0000
committermbr <mbr@FreeBSD.org>2003-01-10 08:09:58 +0000
commit9f1243940bfab5bf1006a5d8a39c39a8d688f28e (patch)
treef2496f3c07328af9a2edd5ddb808e004161522c4 /sys/dev
parent92b8a62ce5f67fa00bad3929c26f8d1a19458541 (diff)
downloadFreeBSD-src-9f1243940bfab5bf1006a5d8a39c39a8d688f28e.zip
FreeBSD-src-9f1243940bfab5bf1006a5d8a39c39a8d688f28e.tar.gz
When reading PHY regs over the i2c bus, the turnaround ACK bit
is read one clock edge too late. This bit is driven low by slave (as any other input data bits from slave) when the clock is LOW. The current code did read the bit after the clock was driven high again. Reviewed by: luoqi MFC after: 2 weeks
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/nge/if_nge.c2
-rw-r--r--sys/dev/vr/if_vr.c2
-rw-r--r--sys/dev/xe/if_xe.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/nge/if_nge.c b/sys/dev/nge/if_nge.c
index 67fa7bd..d498ebb 100644
--- a/sys/dev/nge/if_nge.c
+++ b/sys/dev/nge/if_nge.c
@@ -483,9 +483,9 @@ nge_mii_readreg(sc, frame)
/* Check for ack */
SIO_CLR(NGE_MEAR_MII_CLK);
DELAY(1);
+ ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA;
SIO_SET(NGE_MEAR_MII_CLK);
DELAY(1);
- ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA;
/*
* Now try reading data bits. If the ack failed, we still
diff --git a/sys/dev/vr/if_vr.c b/sys/dev/vr/if_vr.c
index 81e00b5..407abf1 100644
--- a/sys/dev/vr/if_vr.c
+++ b/sys/dev/vr/if_vr.c
@@ -329,9 +329,9 @@ vr_mii_readreg(sc, frame)
/* Check for ack */
SIO_CLR(VR_MIICMD_CLK);
DELAY(1);
+ ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
SIO_SET(VR_MIICMD_CLK);
DELAY(1);
- ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
/*
* Now try reading data bits. If the ack failed, we still
diff --git a/sys/dev/xe/if_xe.c b/sys/dev/xe/if_xe.c
index bbbf095..6ba4de4 100644
--- a/sys/dev/xe/if_xe.c
+++ b/sys/dev/xe/if_xe.c
@@ -1659,9 +1659,9 @@ xe_mii_readreg(struct xe_softc *scp, struct xe_mii_frame *frame) {
/* Check for ack */
XE_MII_CLR(XE_MII_CLK);
DELAY(1);
+ ack = XE_INB(XE_GPR2) & XE_MII_RDD;
XE_MII_SET(XE_MII_CLK);
DELAY(1);
- ack = XE_INB(XE_GPR2) & XE_MII_RDD;
/*
* Now try reading data bits. If the ack failed, we still
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