firewire.c

- Fix permission of device node.

fwochi.c, fwohcireg.h
- Detect phy access failure correct way.
- Set root hold-off bit before initiating bus reset.
	This should fix the problem with VIA6306.

fwohcivar.h
- Fix over-allocation of array. (fwohcivar.h)

sbp.c
- Return CAM_DEV_NOT_THERE rather than CAM_TID_INVALID to prevent retry.

5 files changed, 36 insertions, 36 deletions

diff --git a/sys/dev/firewire/firewire.c b/sys/dev/firewire/firewire.c
index 9c75447..4046a2e 100644
--- a/sys/dev/firewire/firewire.c
+++ b/sys/dev/firewire/firewire.c
@@ -501,7 +501,7 @@ firewire_attach( device_t dev )
 		mn = unitmask | i;
 		/* XXX device name should be improved */
 		d = make_dev(&firewire_cdevsw, unit2minor(mn),
-			UID_ROOT, GID_OPERATOR, 0770,
+			UID_ROOT, GID_OPERATOR, 0660,
 			"fw%x", mn);
 #if __FreeBSD_version >= 500000
 		if (i == 0)
@@ -513,7 +513,7 @@ firewire_attach( device_t dev )
 #endif
 	}
 	d = make_dev(&firewire_cdevsw, unit2minor(unitmask | FWMEM_FLAG),
-			UID_ROOT, GID_OPERATOR, 0770,
+			UID_ROOT, GID_OPERATOR, 0660,
 			"fwmem%d", device_get_unit(dev));
 #if __FreeBSD_version >= 500000
 	dev_depends(sc->dev, d);
diff --git a/sys/dev/firewire/fwohci.c b/sys/dev/firewire/fwohci.c
index a72d26d..39b4d56 100644
--- a/sys/dev/firewire/fwohci.c
+++ b/sys/dev/firewire/fwohci.c
@@ -310,6 +310,18 @@ fwphy_rddata(struct fwohci_softc *sc,  u_int addr)
 	addr &= 0xf;
 	fun = PHYDEV_RDCMD | (addr << PHYDEV_REGADDR);
 	OWRITE(sc, OHCI_PHYACCESS, fun);
+#if 1
+	/* Make sure that SCLK is started */
+	for(i = 0; i < 1000; i++) {
+		if ((OREAD(sc, FWOHCI_INTSTAT) & OHCI_INT_REG_FAIL) == 0)
+			break;
+		DELAY(100);
+		OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_REG_FAIL);
+		OWRITE(sc, OHCI_PHYACCESS, fun);
+	}
+	if (bootverbose)
+		device_printf(sc->fc.dev, "fwphy_rddata: write loop=%d\n", i);
+#endif
 	for ( i = 0 ; i < 1000 ; i ++ ){
 		fun = OREAD(sc, OHCI_PHYACCESS);
 		if ((fun & PHYDEV_RDCMD) == 0 && (fun & PHYDEV_RDDONE) != 0)
@@ -456,6 +468,9 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
 	
 	fw_init(&sc->fc);
 
+/* Disable interrupt */ 
+	OWRITE(sc, FWOHCI_INTMASKCLR, ~0);
+
 /* Now stopping all DMA channel */
 	OWRITE(sc,  OHCI_ARQCTLCLR, OHCI_CNTL_DMA_RUN);
 	OWRITE(sc,  OHCI_ARSCTLCLR, OHCI_CNTL_DMA_RUN);
@@ -478,10 +493,7 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
 		DELAY(1000);
 	}
 	if (bootverbose)
-		printf("done (%d)\n", i);
-	OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS);
-	/* XXX wait for SCLK. */
-	DELAY(100000);
+		printf("done (loop=%d)\n", i);
 
 	reg = OREAD(sc,  OHCI_BUS_OPT);
 	reg2 = reg | OHCI_BUSFNC;
@@ -504,13 +516,13 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
  *    number of port supported by core-logic.
  *    It is not actually available port on your PC .
  */
-	/* Wait a while */
-	reg = fwphy_rddata(sc, FW_PHY_SPD_REG);
+	OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS);
 #if 0
-	/* try again */
-	DELAY(1000);
-	reg = fwphy_rddata(sc, FW_PHY_SPD_REG);
+	/* XXX wait for SCLK. */
+	DELAY(100000);
 #endif
+	reg = fwphy_rddata(sc, FW_PHY_SPD_REG);
+
 	if((reg >> 5) != 7 ){
 		sc->fc.mode &= ~FWPHYASYST;
 		sc->fc.nport = reg & FW_PHY_NP;
@@ -629,7 +641,6 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
 
 	OWRITE(sc, FWOHCI_RETRY,
 		(0xffff << 16 )| (0x0f << 8) | (0x0f << 4) | 0x0f) ;
-	OWRITE(sc, FWOHCI_INTMASKCLR, ~0);
 	OWRITE(sc, FWOHCI_INTMASK,
 			OHCI_INT_ERR  | OHCI_INT_PHY_SID 
 			| OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS 
@@ -1992,6 +2003,14 @@ fwohci_ibr(struct firewire_comm *fc)
 	u_int32_t fun;
 
 	sc = (struct fwohci_softc *)fc;
+
+	/*
+	 * Set root hold-off bit so that non cyclemaster capable node
+	 * shouldn't became the root node.
+	 */
+	fun = fwphy_rddata(sc, FW_PHY_RHB_REG);
+	fun |= FW_PHY_RHB;
+	fun = fwphy_wrdata(sc, FW_PHY_RHB_REG, fun);
 #if 1
 	fun = fwphy_rddata(sc, FW_PHY_IBR_REG);
 	fun |= FW_PHY_IBR;
diff --git a/sys/dev/firewire/fwohcireg.h b/sys/dev/firewire/fwohcireg.h
index cbc556d..cb399b6 100644
--- a/sys/dev/firewire/fwohcireg.h
+++ b/sys/dev/firewire/fwohcireg.h
@@ -300,27 +300,6 @@ struct fwohcidb_tr{
 /*
  * OHCI info structure.
  */
-#if 0
-struct fwohci_softc {
-	struct fw_softc fc;
-	volatile struct ohci_registers *base;
-	int		init;
-#define	SIDPHASE	1
-	u_int32_t	flags;
-	struct 		fwohcidb_tr *db_tr[OHCI_MAX_DMA_CH];
-	struct 		fwohcidb_tr *db_first[OHCI_MAX_DMA_CH];
-	struct 		fwohcidb_tr *db_last[OHCI_MAX_DMA_CH];
-        struct {
-		int		tail;
-		struct fwohcidb_tr *db_tr;
-		struct fwohcidb *db;
-        }dbdvtx[MAX_DVFRAME], dbdvrx[MAX_DVFRAME];
-	int		ndb[OHCI_MAX_DMA_CH];
-        u_int32_t	isohdr[OHCI_MAX_DMA_CH];
-        int		queued[OHCI_MAX_DMA_CH];
-        int		dma_ch[OHCI_MAX_DMA_CH];
-};
-#endif
 struct fwohci_txpkthdr{
 	union{
 		u_int32_t ld[4];
@@ -378,6 +357,8 @@ struct fwohci_trailer{
 #define OHCI_INT_PHY_SID	(0x1 << 16)
 #define OHCI_INT_PHY_BUS_R	(0x1 << 17)
 
+#define OHCI_INT_REG_FAIL	(0x1 << 18)
+
 #define OHCI_INT_PHY_INT	(0x1 << 19)
 #define OHCI_INT_CYC_START	(0x1 << 20)
 #define OHCI_INT_CYC_64SECOND	(0x1 << 21)
diff --git a/sys/dev/firewire/fwohcivar.h b/sys/dev/firewire/fwohcivar.h
index 356bb19..6b7c954 100644
--- a/sys/dev/firewire/fwohcivar.h
+++ b/sys/dev/firewire/fwohcivar.h
@@ -60,7 +60,7 @@ typedef struct fwohci_softc {
 		int flags;
 #define	FWOHCI_DBCH_FULL	(1<<1)
 		int buf_offset;
-	} arrq, arrs, atrq, atrs, it[OHCI_MAX_DMA_CH], ir[OHCI_MAX_DMA_CH];
+	} arrq, arrs, atrq, atrs, it[OHCI_DMA_ITCH], ir[OHCI_DMA_IRCH];
 	u_int maxrec;
 	u_int32_t *cromptr;
 	u_int32_t intmask;
diff --git a/sys/dev/firewire/sbp.c b/sys/dev/firewire/sbp.c
index 83d692ba..4dacad1 100644
--- a/sys/dev/firewire/sbp.c
+++ b/sys/dev/firewire/sbp.c
@@ -1723,7 +1723,7 @@ SBP_DEBUG(1)
 				ccb->ccb_h.func_code);
 END_DEBUG
 
-			ccb->ccb_h.status = CAM_TID_INVALID;
+			ccb->ccb_h.status = CAM_DEV_NOT_THERE;
 			xpt_done(ccb);
 			return;
 		}
@@ -1743,7 +1743,7 @@ SBP_DEBUG(0)
 				ccb->ccb_h.target_id, ccb->ccb_h.target_lun,
 				ccb->ccb_h.func_code);
 END_DEBUG
-			ccb->ccb_h.status = CAM_TID_INVALID;
+			ccb->ccb_h.status = CAM_DEV_NOT_THERE;
 			xpt_done(ccb);
 			return;
 		}