diff options
author | jhb <jhb@FreeBSD.org> | 2003-08-28 21:22:25 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2003-08-28 21:22:25 +0000 |
commit | 51be1787c3f88a0d7f0e7acc9c80f8efe14d4107 (patch) | |
tree | a1e7aeb2faa12e05e2679df87b9fa88f7bfd5295 /sys/dev | |
parent | fed4d10a43fd7e42c8ab0e04aad88fa09632b414 (diff) | |
download | FreeBSD-src-51be1787c3f88a0d7f0e7acc9c80f8efe14d4107.zip FreeBSD-src-51be1787c3f88a0d7f0e7acc9c80f8efe14d4107.tar.gz |
- Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.
- Add a new PCIM_HDRTYPE constant for the field in PCIR_HDRTYPE that holds
the header type.
- Replace several magic numbers with appropriate constants for the header
type register and a couple of PCI_FUNCMAX.
- Merge to amd64 the fix to the i386 bridge code to skip devices with
unknown header types.
Requested by: imp (1, 2)
Diffstat (limited to 'sys/dev')
-rw-r--r-- | sys/dev/acpica/Osd/OsdHardware.c | 6 | ||||
-rw-r--r-- | sys/dev/pci/pci.c | 6 | ||||
-rw-r--r-- | sys/dev/pci/pcireg.h | 9 | ||||
-rw-r--r-- | sys/dev/puc/puc_pci.c | 2 |
4 files changed, 12 insertions, 11 deletions
diff --git a/sys/dev/acpica/Osd/OsdHardware.c b/sys/dev/acpica/Osd/OsdHardware.c index afc32e8..90d2385 100644 --- a/sys/dev/acpica/Osd/OsdHardware.c +++ b/sys/dev/acpica/Osd/OsdHardware.c @@ -213,10 +213,10 @@ acpi_bus_number(ACPI_HANDLE root, ACPI_HANDLE curr, ACPI_PCI_ID *PciId) return (bus); subclass = pci_cfgregread(bus, slot, func, PCIR_SUBCLASS, 1); /* Find the header type, masking off the multifunction bit */ - header = pci_cfgregread(bus, slot, func, PCIR_HEADERTYPE, 1) & 0x7f; - if (header == 1 && subclass == PCIS_BRIDGE_PCI) + header = pci_cfgregread(bus, slot, func, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE; + if (header == PCIM_HDRTYPE_BRIDGE && subclass == PCIS_BRIDGE_PCI) bus = pci_cfgregread(bus, slot, func, PCIR_SECBUS_1, 1); - if (header == 2 && subclass == PCIS_BRIDGE_CARDBUS) + if (header == PCIM_HDRTYPE_CARDBUS && subclass == PCIS_BRIDGE_CARDBUS) bus = pci_cfgregread(bus, slot, func, PCIR_SECBUS_2, 1); return (bus); } diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c index aab9339..bd8c290 100644 --- a/sys/dev/pci/pci.c +++ b/sys/dev/pci/pci.c @@ -354,7 +354,7 @@ pci_read_device(device_t pcib, int b, int s, int f, size_t size) cfg->subclass = REG(PCIR_SUBCLASS, 1); cfg->progif = REG(PCIR_PROGIF, 1); cfg->revid = REG(PCIR_REVID, 1); - cfg->hdrtype = REG(PCIR_HEADERTYPE, 1); + cfg->hdrtype = REG(PCIR_HDRTYPE, 1); cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); cfg->lattimer = REG(PCIR_LATTIMER, 1); cfg->intpin = REG(PCIR_INTPIN, 1); @@ -834,8 +834,8 @@ pci_add_children(device_t dev, int busno, size_t dinfo_size) for (s = 0; s <= maxslots; s++) { pcifunchigh = 0; f = 0; - hdrtype = REG(PCIR_HEADERTYPE, 1); - if ((hdrtype & ~PCIM_MFDEV) > PCI_MAXHDRTYPE) + hdrtype = REG(PCIR_HDRTYPE, 1); + if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) continue; if (hdrtype & PCIM_MFDEV) pcifunchigh = PCI_FUNCMAX; diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index 75a276d..e851a8a 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -80,10 +80,11 @@ #define PCIR_CLASS 0x0b #define PCIR_CACHELNSZ 0x0c #define PCIR_LATTIMER 0x0d -#define PCIR_HEADERTYPE 0x0e -#define PCIM_HEADERTYPE_NORMAL 0x00 -#define PCIM_HEADERTYPE_BRIDGE 0x01 -#define PCIM_HEADERTYPE_CARDBUS 0x02 +#define PCIR_HDRTYPE 0x0e +#define PCIM_HDRTYPE 0x7f +#define PCIM_HDRTYPE_NORMAL 0x00 +#define PCIM_HDRTYPE_BRIDGE 0x01 +#define PCIM_HDRTYPE_CARDBUS 0x02 #define PCIM_MFDEV 0x80 #define PCIR_BIST 0x0f diff --git a/sys/dev/puc/puc_pci.c b/sys/dev/puc/puc_pci.c index 1ea161e..1e6de33 100644 --- a/sys/dev/puc/puc_pci.c +++ b/sys/dev/puc/puc_pci.c @@ -88,7 +88,7 @@ puc_pci_probe(device_t dev) uint32_t v1, v2, d1, d2; const struct puc_device_description *desc; - if ((pci_read_config(dev, PCIR_HEADERTYPE, 1) & 0x7f) != 0) + if ((pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) != 0) return (ENXIO); v1 = pci_read_config(dev, PCIR_VENDOR, 2); |