MFC

9 files changed, 14 insertions, 10 deletions

diff --git a/sys/dev/acpica/acpi_pcib_acpi.c b/sys/dev/acpica/acpi_pcib_acpi.c
index 49367d0..dc3e5b1 100644
--- a/sys/dev/acpica/acpi_pcib_acpi.c
+++ b/sys/dev/acpica/acpi_pcib_acpi.c
@@ -268,7 +268,7 @@ acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
 
     switch (which) {
     case PCIB_IVAR_DOMAIN:
-	*result = 0;
+	*result = sc->ap_segment;
 	return (0);
     case PCIB_IVAR_BUS:
 	*result = sc->ap_bus;
diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c
index e2ad075..01bf938 100644
--- a/sys/dev/bge/if_bge.c
+++ b/sys/dev/bge/if_bge.c
@@ -39,7 +39,7 @@ __FBSDID("$FreeBSD$");
  *
  * The Broadcom BCM5700 is based on technology originally developed by
  * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
- * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
+ * MAC chips. The BCM5700, sometimes referred to as the Tigon III, has
  * two on-board MIPS R4000 CPUs and can have as much as 16MB of external
  * SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo
  * frames, highly configurable RX filtering, and 16 RX and TX queues
@@ -1022,7 +1022,7 @@ bge_newbuf_jumbo(struct bge_softc *sc, int i)
 		return (error);
 	}
 
-	if (sc->bge_cdata.bge_rx_jumbo_chain[i] == NULL) {
+	if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
 		bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo,
 		    sc->bge_cdata.bge_rx_jumbo_dmamap[i], BUS_DMASYNC_POSTREAD);
 		bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
@@ -3419,7 +3419,7 @@ bge_reset(struct bge_softc *sc)
 		pci_write_config(dev, sc->bge_pcixcap + PCIXR_COMMAND,
 		    devctl, 2);
 	}
-	/* Re-enable MSI, if neccesary, and enable the memory arbiter. */
+	/* Re-enable MSI, if necessary, and enable the memory arbiter. */
 	if (BGE_IS_5714_FAMILY(sc)) {
 		/* This chip disables MSI on reset. */
 		if (sc->bge_flags & BGE_FLAG_MSI) {
diff --git a/sys/dev/bxe/bxe_debug.h b/sys/dev/bxe/bxe_debug.h
index a08641b..99cbe5d 100644
--- a/sys/dev/bxe/bxe_debug.h
+++ b/sys/dev/bxe/bxe_debug.h
@@ -210,7 +210,7 @@ extern uint32_t bxe_debug;
 /* Returns FALSE in "defects" per 2^31 - 1 calls, otherwise returns TRUE. */
 #define DB_RANDOMFALSE(defects)        (random() > defects)
 #define DB_OR_RANDOMFALSE(defects)  || (random() > defects)
-#define DB_AND_RANDOMFALSE(defects) && (random() > ddfects)
+#define DB_AND_RANDOMFALSE(defects) && (random() > defects)
 
 /* Returns TRUE in "defects" per 2^31 - 1 calls, otherwise returns FALSE. */
 #define DB_RANDOMTRUE(defects)         (random() < defects)
diff --git a/sys/dev/bxe/if_bxe.h b/sys/dev/bxe/if_bxe.h
index 2ef9c66..cb3e9c7 100644
--- a/sys/dev/bxe/if_bxe.h
+++ b/sys/dev/bxe/if_bxe.h
@@ -1150,9 +1150,6 @@ struct bxe_fastpath {
 
 /* ToDo: Audit this structure for unused varaibles. */
 struct bxe_softc {
-	/*
-	 * MUST start with ifnet pointer (see definition of miibus_statchg()).
-	 */
 	struct ifnet		*bxe_ifp;
 	int			media;
 
diff --git a/sys/dev/cardbus/cardbus.c b/sys/dev/cardbus/cardbus.c
index 6edf183..39d20b5 100644
--- a/sys/dev/cardbus/cardbus.c
+++ b/sys/dev/cardbus/cardbus.c
@@ -317,7 +317,6 @@ static device_method_t cardbus_methods[] = {
 
 	/* Bus interface */
 	DEVMETHOD(bus_read_ivar,	cardbus_read_ivar),
-	DEVMETHOD(bus_write_ivar,	pci_write_ivar),
 	DEVMETHOD(bus_driver_added,	cardbus_driver_added),
 
 	/* Card Interface */
diff --git a/sys/dev/coretemp/coretemp.c b/sys/dev/coretemp/coretemp.c
index eec93d8..777a591 100644
--- a/sys/dev/coretemp/coretemp.c
+++ b/sys/dev/coretemp/coretemp.c
@@ -192,7 +192,7 @@ coretemp_attach(device_t dev)
 	} else if (cpu_model == 0x17) {
 		switch (cpu_stepping) {
 		case 0x6:	/* Mobile Core 2 Duo */
-			sc->sc_tjmax = 104;
+			sc->sc_tjmax = 105;
 			break;
 		default:	/* Unknown stepping */
 			break;
diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c
index 024274d..e3d890b 100644
--- a/sys/dev/mii/brgphy.c
+++ b/sys/dev/mii/brgphy.c
@@ -143,6 +143,7 @@ static const struct mii_phydesc brgphys[] = {
 	MII_PHY_DESC(xxBROADCOM_ALT1, BCM5761),
 	MII_PHY_DESC(xxBROADCOM_ALT1, BCM5709S),
 	MII_PHY_DESC(xxBROADCOM_ALT2, BCM5717C),
+	MII_PHY_DESC(xxBROADCOM_ALT2, BCM57765),
 	MII_PHY_DESC(BROADCOM2, BCM5906),
 	MII_PHY_END
 };
diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs
index 8ca2abd..0f2230b 100644
--- a/sys/dev/mii/miidevs
+++ b/sys/dev/mii/miidevs
@@ -159,6 +159,7 @@ model xxBROADCOM_ALT1 BCM5709C	0x003c BCM5709C 10/100/1000baseTX PHY
 model xxBROADCOM_ALT1 BCM5761	0x003d BCM5761 10/100/1000baseTX PHY
 model xxBROADCOM_ALT1 BCM5709S	0x003f BCM5709S 1000/2500baseSX PHY
 model xxBROADCOM_ALT2 BCM5717C	0x0020 BCM5717C 10/100/1000baseTX PHY
+model xxBROADCOM_ALT2 BCM57765	0x0024 BCM57765 10/100/1000baseTX PHY
 model BROADCOM2 BCM5906		0x0004 BCM5906 10/100baseTX PHY
 
 /* Cicada Semiconductor PHYs (now owned by Vitesse?) */
diff --git a/sys/dev/puc/pucdata.c b/sys/dev/puc/pucdata.c
index b8cf378..4d19ddae 100644
--- a/sys/dev/puc/pucdata.c
+++ b/sys/dev/puc/pucdata.c
@@ -638,6 +638,12 @@ const struct puc_cfg puc_pci_devices[] = {
 	    PUC_PORT_4S, 0x10, 0, 8,
 	},
 
+	{   0x1415, 0x9501, 0x14db, 0x2150,
+	    "Kuroutoshikou SERIAL4P-LPPCI2",
+	    DEFAULT_RCLK * 10,
+	    PUC_PORT_4S, 0x10, 0, 8,
+	},
+
 	{   0x1415, 0x9501, 0xffff, 0,
 	    "Oxford Semiconductor OX16PCI954 UARTs",
 	    DEFAULT_RCLK,