Spell "Hz" correctly wherever it is user-visible.

PR:		bin/142566
Submitted by:	N.J. Mann   njm njm.me.uk
Approved by:	ed (mentor)
MFC after:	2 weeks

5 files changed, 8 insertions, 8 deletions

diff --git a/sys/dev/aic7xxx/aic79xx_pci.c b/sys/dev/aic7xxx/aic79xx_pci.c
index 928012e..1e3bbed 100644
--- a/sys/dev/aic7xxx/aic79xx_pci.c
+++ b/sys/dev/aic7xxx/aic79xx_pci.c
@@ -248,10 +248,10 @@ static const char *pci_bus_modes[] =
 	"PCI bus mode unknown",
 	"PCI bus mode unknown",
 	"PCI bus mode unknown",
-	"PCI-X 101-133Mhz",
-	"PCI-X 67-100Mhz",
-	"PCI-X 50-66Mhz",
-	"PCI 33 or 66Mhz"
+	"PCI-X 101-133MHz",
+	"PCI-X 67-100MHz",
+	"PCI-X 50-66MHz",
+	"PCI 33 or 66MHz"
 };
 
 #define		TESTMODE	0x00000800ul
diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
index dd35e2b..43e97ed 100644
--- a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
+++ b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
@@ -87,7 +87,7 @@ ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode,
 
 	if (!IEEE80211_IS_CHAN_5GHZ(chan)) {
 		/* Only 11a mode */
-		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: channel not 5Ghz\n", __func__);
+		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: channel not 5GHz\n", __func__);
 		FAIL(HAL_EINVAL);
 	}
 	/*
diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c
index 27912de..ed69a7d 100644
--- a/sys/dev/ath/if_ath.c
+++ b/sys/dev/ath/if_ath.c
@@ -5351,7 +5351,7 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
 		ath_stoprecv(sc);		/* turn off frame recv */
 		if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) {
 			if_printf(ifp, "%s: unable to reset "
-			    "channel %u (%u Mhz, flags 0x%x), hal status %u\n",
+			    "channel %u (%u MHz, flags 0x%x), hal status %u\n",
 			    __func__, ieee80211_chan2ieee(ic, chan),
 			    chan->ic_freq, chan->ic_flags, status);
 			return EIO;
diff --git a/sys/dev/ct/ct_isa.c b/sys/dev/ct/ct_isa.c
index a1e3045..693572f 100644
--- a/sys/dev/ct/ct_isa.c
+++ b/sys/dev/ct/ct_isa.c
@@ -316,7 +316,7 @@ ct_isa_attach(device_t dev)
 		break;
 	}
 #if	0
-	printf("%s: chiprev %s chipclk %d Mhz\n", 
+	printf("%s: chiprev %s chipclk %d MHz\n", 
 		slp->sl_dev.dv_xname, s, ct->sc_chipclk);
 #endif
 
diff --git a/sys/dev/mly/mly.c b/sys/dev/mly/mly.c
index b26c90a..189f539 100644
--- a/sys/dev/mly/mly.c
+++ b/sys/dev/mly/mly.c
@@ -2528,7 +2528,7 @@ mly_describe_controller(struct mly_softc *sc)
 		   mly_describe_code(mly_table_memorytype, mi->memory_type),
 		   mi->memory_parity ? "+parity": "",mi->memory_ecc ? "+ECC": "",
 		   mi->cache_size);
-	mly_printf(sc, "CPU: %s @ %dMHZ\n", 
+	mly_printf(sc, "CPU: %s @ %dMHz\n", 
 		   mly_describe_code(mly_table_cputype, mi->cpu[0].type), mi->cpu[0].speed);
 	if (mi->l2cache_size != 0)
 	    mly_printf(sc, "%dKB L2 cache\n", mi->l2cache_size);